1 / 12

The ALU

The ALU. ALU includes combinational logic. Combinational logic  a change in inputs directly causes a change in output, after a characteristic delay. Different from sequential logic which only changes on the clock .

adellak
Télécharger la présentation

The ALU

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. The ALU • ALU includes combinational logic. • Combinational logic  a change in inputs directly causes a change in output, after a characteristic delay. • Different from sequential logic which only changes on the clock. • Two major components of combinational logic are – multiplexors & decoders. • 2-input multiplexor (or selector) is implemented with gates below a b a b c c s s gate implementation symbol

  2. c Multiplexors (MUXes) s • Multiplexors can have any number of inputs (in theory) • Multiplexors can apply to buses  multiplied for • many lines. • Example: 1 x 2 multiplexor on 32 bits bus. 0 1 2 3 4 5 6 7 a31 b31 M c31 3 X 8 multiplexor a30 b30 s2 c30 M s1 s0 . . . . . . 32 a b 32 c a0 b0 M c0 32 symbol s

  3. 0 1 2 3 4 5 6 7 0 1 2 DECODER Decoders Inputs Outputs I2 I1 I0 O7 O6 O5 O4 O3 O2 O1 O0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 3 X 8 Decoder • Each combination of the inputs enables exactly one output.

  4. The ALU • The ALU provides the basic logical and arithmetic functions: AND, OR plus addition. • Subtraction in 2's complement  invert +1. • Shift, multiplication and division are usually outside the basic ALU. Logical operations a b 0 1 result MUX select (AND or OR) 1 bit logical unit for AND/OR operations

  5. outputs inputs abCinsumCout 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Cin a b Cout 1 bit FULL adder (3,2) a b Carry out Carry in Cout Cin sum sum = (a  b  Cin) + (a  b  Cin) + (a  b  Cin) + (a b  Cin) = a + b + Cin Cout =(b  Cin) + (a  Cin) + (a  b) = ((a + b)  Cin) + (a  b) Adder hardware for Cout in 2 layers

  6. a b sum Cout Cin sum a b Cout Full Adder from Half Adders Half adder Full adder from 2 half adders + or gate

  7. 1 Bit Simple ALU 1 bit simple ALU for logical / arithmetic operations Cin select 2 a b 0 1 2 result + Cout

  8. 1 Bit Enhanced ALU Enhanced for subtraction invert Cin select 2 a b 0 1 2 result + 0 1 1's complement Cout 2's complement: use Cin = 1 subtraction: a + b + 1 = a + (b + 1) = a + (-b) = a - b

  9. Cin operation = invert + select 3 Ripple Carry Type Adder Cin ALU0 Cout a0 b0 32 bit ADDER with ripple carry: result 0 • To produce a 32 bit result, we connect 32 single bit units together. • This type of ALU adder is called a ripple adder • Carry bits are generated in sequence. • Bit 31 result and Cout is not correct until it receives Cin from previous unit, which is not correct until it receives Cin from its previous unit, etc. • Total operation time is proportional to word size (here 32). Cin ALU1 Cout a1 b1 result 1 Cin ALU2 Cout a2 b2 result 2 . . . . . . Cin ALU31 Cout a31 b31 result 31 Cout

  10. Carry Lookahead • Ripple arithmetic operations are too slow for high performance • We can calculate all carries in 2-level logic, avoiding the ripple. We know that any logical function can be represented in canonical form (sum of products) but it requires more gates  too expensive. • Carry bit i has two possibilities: either a b and no carry in, or a + b and carry in. But carry in itself is the same combination of the bits previous to those that created it. Hence two level logic has 2n terms for n bits. • Practical adders use carry lookahead. • factors out two basic functions which give us the carries • Generate - does bit i create a carry by itself? • Propagate - does bit i send a carry ahead to the next position? gi = (ai  bi) pi = (ai + bi) ci+1 = gi + pi ci

  11. Illustration of Carry Lookahead for 4 Bit Adder cin = c0 g3 p3 g1 p1 g0 p0 g2 p2 c1 = g0 + (p0c0) c2 = g1 + (p1g0) + (p1 p0c0) c3 = g2 + (p2g1) + (p2p1g0) + (p2p1p0c0) c4 = g3 + (p3g2) + (p3p2g1) + (p3p2p1g0) + (p3p2p1 p0c0) Carry Lookahead Unit a3 b3 a1 b1 a0 b0 a2 b2 cin = c0 ALU3 ALU2 ALU1 ALU0 p0 g0 p3 g3 p2 g2 p1 g1 Cout result 0 result 3 result 2 result 1

  12. Carry Lookahead Concept Generalized to Higher Levels Pi = pi0  pi1 pi2 pi3 Ci+1 = Gi + Pi Ci Gi = gi3 + gi2 pi3 + gi1  pi2 pi3 + gi0 pi1 pi2 pi3 Cin = C0 G3 P3 G2 P2 G1 P1 G0 P0 Carry Lookahead on 4-bit units (provides logarithmic complexity) Cin = C0 a12..15 b12..15 a8..11 b8..11 a4..7 b4..7 a0..3 b0..3 4 4 4 4 4 4 4 4 Cout 4-bit Adder 3 12 - 15 4-bit Adder 2 8 - 11 4-bit Adder 1 4 - 7 4-bit Adder 0 0 - 3 p3x g3x p2x g2x p1x g1x p00,..., p03 g00,..., g03 4 4 4 4 4 4 4 4 result 0..3 result 12..15 result 8..11 result 4..7

More Related