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Stability and Passivity of the Super Node Algorithm for EM modelling of ICs

Stability and Passivity of the Super Node Algorithm for EM modelling of ICs. Maria Ugryumova Supervisor : Wil Schilders Technical University Eindhoven, The Netherlands. CASA day, 13 November 2008. Outline. 1. Motivation 2. Fasterix and EM simulation 3. System parameters

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Stability and Passivity of the Super Node Algorithm for EM modelling of ICs

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  1. Stability and Passivity of the Super Node Algorithmfor EM modelling of ICs Maria Ugryumova Supervisor: Wil Schilders Technical University Eindhoven, The Netherlands CASA day, 13 November 2008

  2. Outline • 1. Motivation • 2. Fasterix and EM simulation • 3. System parameters • 4. Super Node Algorithm • 5. Numerical example • 6. Passivity enforcement • 7. Conclusions • From the original model to the reduced one • Realization 1

  3. Outline • 1. Motivation • 2. Fasterix and EM simulation • 3. System parameters • 4. Super Node Algorithm • 5.Numerical example • 6. Passivity enforcement • 7. Conclusions • From the original model to the reduced one • Realization 1

  4. Motivation • increasingIC complexity • smaller feature sizes • higher frequencies • multilayer structure • electromagnetic effects transistors 65 nm – 45 nm 1.06GHz – 3.33GHz 9 layers Intel CoreTM2 Processors Solution EM tools Model Order Reduction 2

  5. Motivation Model Order Reduction: Super Node Algorithm • program simulator PSTAR (NXP) • radiated EM fields Fasterix – layout simulation tool for EM modelling (NXP) properties of ICs 3

  6. Motivating example unstable Time response of the lowpass filter model (300 unknowns). Why is it unstable? • Key questions? • What is the reason of instability? • How can we avoid the instability? 4

  7. Outline • 1. Motivation • 2. Fasterix and EM simulation • 3. System parameters • 4. Super Node Algorithm • 5.Numerical example • 6. Passivity enforcement • 7. Conclusions • From the original model to the reduced one • Realization 5

  8. How Fasterix works [Du Cloux 1993], [Wachters, Schilders 1997] • Initial data (coordinates, pins, metal, max. frequency, etc.) • Geometry preprocessor; 1. 2. 6

  9. How Fasterix works [Du Cloux 1993], [Wachters, Schilders 1997] • Initial data (coordinates, pins, metal, max. frequency, etc.) • Geometry preprocessor; BVP • Full RLC circuit – inefficient! 3. 7

  10. How Fasterix works [Du Cloux 1993], [Wachters, Schilders 1997] • Initial data (coordinates, pins, metal, max. frequency, etc.) • Geometry preprocessor; BVP • Full RLC circuit – inefficient! • Super nodes are defined • Reduced RLC circuit - efficient! 4. 5. Super node algorithm 8

  11. Outline • 1. Motivation • 2. Fasterix and EM simulation • 3. System parameters • 4. Super Node Algorithm • 5. Passivity enforcement • 6. Numerical examples • 7. Conclusions • From the original model to the reduced one • Realization 9

  12. System parameters • Linear time invariant system • Transfer function – residuals – poles • Poles are for which or i.e. poles are eigenvaluesof 10

  13. System parameters Stable • Passive systems • dissipate power delivered through input and output ports • synthesizable with positive R,L,C and transformers [Brune ‘31] • Passivepositive real: H(s) is analytic for Re(s)>0 11

  14. Outline • 1. Motivation • 2. Fasterix and EM simulation • 3. System parameters • 4. Super Node Algorithm • 5. Numerical example • 6. Passivity enforcement • 7. Conclusions • From the original model to the reduced one • Realization 12

  15. SNA: original (non-reduced) RLC model • Kirchhoff equations I - current in the branches V – voltage in the nodes J – currents, floating into the sys. through the nodes G – positive real, C – positive definite given unknown • Voltage to current transfer: Admittance matrix • Y(s) is stable and positive real 13

  16. SNA: Model Order Reduction Super Node Algorithm (SNA) port 2 port 1 port 1 port 2 Generated by BEM • 1. Elimination of non-super nodes: • 2. Two steps of approximations • 3. Realization of the circuit 14

  17. 1. SNA: Elimination of non-super nodes • Kirchhoff equations R, L, C – positive definite • Partitioning N – super nodes N’ – all other nodes 15

  18. 1. SNA: Elimination of non-super nodes • Kirchhoff equations R, L, C – positive definite • Partitioning N – super nodes N’ – all other nodes • Substitution into (1) 15

  19. 1. SNA: Elimination of non-super nodes • Kirchhoff equations R, L, C – positive definite • Partitioning N – super nodes N’ – all other nodes • Substitution into (1) • - Schur complement of • stable: eig(-G,C)<0 • positive real G – positive real, C – positive definite 16

  20. Sketch of the proof: - positive real 1. Stable: • - Schur complement of • Y(s) – positive definite: 4. Lemma If is positive definite matrix then its Schur complements are positive definite. 5. By Lemma, positive definite positive real 17

  21. 2. SNA: Model Order Reduction Super Node Algorithm (SNA) port 1 port 2 port 1 port 2 Generated by BEM • 1. Elimination of non-super nodes: • 2. Two steps of approximations • 3. Realization of the circuit 18

  22. 2. SNA: 1st approximation: • Under the assumption: , - free-space wave number. • Pairs found from two systems: • If then 19

  23. 2. SNA: 2nd approximation: (details) high freq. range Yc – indefinite! • Introducing the null space for , we solve: In the pole-residual form: • stable • notpositive real • computation of eigenvalues 20

  24. SNA: Comparison of the approximations 0.5 GHz • All approximations match well • Capacitances start influence at high frequencies 21

  25. Outline • 1. Motivation • 2. Fasterix and EM simulation • 3. System parameters • 4. Super Node Algorithm • 5. Passivity enforcement • 6. Numerical examples • 7. Conclusions • From the original model to the reduced one • Realization 22

  26. SNA: Model Order Reduction (MOR) Super Node Algorithm (SNA) Generated by BEM • 1. Elimination of non-super nodes: • 2. Two steps of approximations • 3. 23

  27. 3. SNA: Realization of the reduced circuit RLC circuit realization stable not positive real • Calculate m<<n eigenvalues • Choose (m+1) match frequencies • Solve for • Circuit elements 24

  28. 3. SNA: Realization of the reduced circuit RLC circuit realization stable not positive real [Guillemin’68] • N – number of super nodes • m – number of branches between each pair of s.n. 25

  29. Key question? • What is the reason of instability in time domain? 26

  30. 3. SNA: Realization of the reduced circuit RLC circuit realization stable not positive real • MNA: dimension of the system ) • Redundancy • N – number of super nodes • m – number of branches between each pair of s.n. 27

  31. Example (Two parallel striplines, 1MHz) not stable stable dim(G,C) 85 x 85 • Generalized • eigenvalues: • MNA: finite poles: 1.0e+006 -0.33075173081148 -0.33075151394768 -0.33075158822141 -0.73063347579307 -0.73063369561798 -0.73063384656739 -0.68099777735205 -0.68099799754699 -0.68099790176943 -0.62258539700220 -0.62258525785232 -0.62258531561929 9.90350498680717 0.00000000000670 • Match frequencies (Fasterix): sk(1)=0 sk(2)=-526.365 sk(3)=-0.116024e+07 sk(4)=-0.164082e+07 sk(5)=-0.232048e+07 RHP How to guarantee that reduced circuit will be described by the same poles? 28

  32. Two-ports realization port 2 port 1 • Theorem • Super node reduced circuit described by Y(s) with n stable poles, in MNA formulation has exactly the same n poles iff • all ports: grounded / voltage / current sources [proof in progress] 29

  33. Outline • 1. Motivation • 2. Fasterix and EM simulation • 3. System parameters • 4. Super Node Algorithm • 5. Numerical example • 6. Passivity enforcement • 7. Conclusions • From the original model to the reduced one • Realization 30

  34. Example (Lowpass filter, 10e9 Hz) 31

  35. Outline • 1. Motivation • 2. Fasterix and EM simulation • 3. System parameters • 4. Super Node Algorithm • 5.Numerical example • 6.Passivity enforcement • 7. Conclusions • From the original model to the reduced one • Realization 32

  36. Passivity enforcement • not positive real 1.) pos. real Not remedy: Modal approximation [Rommes, 2007] 2.) pos. definite Not pos. definite pos. real 33

  37. Outline • 1. Motivation • 2. Fasterix and EM simulation • 3. System parameters • 4. Super Node Algorithm • 5.Numerical examples • 6. Passivity enforcement • 7. Conclusions • From the original model to the reduced one • Realization 34

  38. Conclusions • Achieved • The reason of instability of SNA models has been found • Remedy to guarantee stability has been presented • Passivity enforcement • Main hurdles • Redundancy of the poles • For N super nodes,m poles circuit elements • Positive R,L,C not guaranteed • Future work • Another approach for simulation of EM effects based on measurement of • Y/Z/S parameters 35

  39. Thank you!

  40. References Schilders, W.H.A. and ter Maten, E.J.W, Special volume : numerical methods in electromagnetics, Elsevier, Amsterdam,2005. Cloux, R.Du and Maas, G.P.J.F.M and Wachters, A.J.H and Milsom, R.F. and Scott, K.J., Fasterix, an environment for PCB simulation,Proc. 11th Int. Conf. on EMC,Zurich, Switzeland, 1993 Rommes J., Methods for eigenvalue problems with applications in model order reduction, Ph.D. dissertation, Utrecht University, Utrecht, The Netherlands, 2007. [Online]. Available: http://rommes.googlepages.com/index.html Guillemin, E.A.,Synthesis of Passive Networks,Wiley,New York,1957

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