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Lecture#11

Lecture#11. M. Mateen Yaqoob The University of Lahore Spring 2014. Design of a basic computer. The basic computer consists of: Memory unit with 4096 ( 4KB) words of 16 bits each Nine registers: AR, PC, DR, AC, IR, TR, OUTR, INPR and SC Seven flip-flops: I, S, E, R, IEN, FGI and FGO

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Lecture#11

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  1. Lecture#11 M. Mateen Yaqoob The University of Lahore Spring 2014

  2. Design of a basic computer • The basic computer consists of: • Memory unit with 4096 (4KB) words of 16 bits each • Nine registers: AR, PC, DR, AC, IR, TR, OUTR, INPR and SC • Seven flip-flops: I, S, E, R, IEN, FGI and FGO • Two decoders: 3x8 operation decoder and 4x16 timing decoder • 16-bit common bus • Control logic gates • Adder and logic circuit connected to the input of AC • The memory unit is a standard component that can be obtained readily from a commercial source

  3. Control logic gates • Input comes from the two decoders and bits 0 through 11 of IR • The other inputs are; • AC bits 0 through 15 to check if AC=0 and to detect the sign bit in AC(15) • DR bits 0 through 15 to check if DR=0 • the values of seven flip-flops • The outputs of control logic circuit are: • Signals to control the input of nine registers • Signals to control the read and write inputs of memory • Signals to set, clear, or complement the flip-flops • Signals for S2, S1 and S0 to select a register for the bus • Signals to control the AC adder and logic circuit

  4. Control of register and memory • Control inputs of registers are LD (load), INR (increment), and CLR (clear) • First three statements specify transfer of information from a register or memory to AR • The content of source register or memory is placed on bus and content of bus is transferred into AR by enabling its LD control input • Fourth statement clears AR to 0 • Last statement increments AR by 1

  5. Control functions can be combined into three Boolean expressions as: • The read operation is recognized by symbol M[AR]

  6. Control of common bus • 16-bit common bus is controlled by selection inputs S2, S1 and S0.

  7. Each binary number is associated with a Boolean variable X1 to X7, corresponding to gate structure that must be active in order to select register or memory for bus • When X1-1 the value of S2S1S0 must be 001 and output of AR will be selected for the bus • Table 5-7 is recognized as truth table for binary encoder • Boolean functions for encoder are:

  8. To determine the logic for each encoder input, it is essential to find the control function which place the corresponding register onto the bus • For example, to find the logic that makes x1=1, we scan all register transfer statements and extract those statements that have AR as source • Boolean function of X1 is:

  9. The logic gate that generates X7 must also be applied to read input of memory • So, the Boolean function for X7 is same as the one derived previously for read operation • In similar manner we can determine logic gate for other registers

  10. Assignment • Perform question number 5-15 and 5-16 • Due Date: 14-07-2014

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