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Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs)

Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: [ Data modulation simulation results ] Date Submitted: [ 7 Sept 2005 ] Source: [ Francois Chin, Wong Sai Ho, Sam Kwok, Lei Zhongding, Peng Xiaoming ]

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Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs)

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  1. Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: [Data modulation simulation results] Date Submitted: [7 Sept 2005] Source: [Francois Chin, Wong Sai Ho, Sam Kwok, Lei Zhongding, Peng Xiaoming] Company: [Institute for Infocomm Research, Singapore] Address: [21 Heng Mui Keng Terrace, Singapore 119613] Voice: [65-68745687] E-Mail: [chinfrancois@i2r.a-star.edu.sg] Abstract: [802.15.4a devices link performance in multipath channels and SOP scenarios] Purpose: [Assist the group in the selection of a modulation scheme] Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P802.15. Francois Chin (I2R)

  2. Simulated Modulation Options Option I Francois Chin (I2R)

  3. Option II Simulated Modulation Options Francois Chin (I2R)

  4. Option 7 / 8 / 9 Simulated Modulation Options Francois Chin (I2R)

  5. Simulated Modulation Options • Option 1 - burst PPM + 1/2-rate CC • Option 2 – Binary Orthogonal Keying (16-chip) + 1/2-rate CC • Option 7 – 4-ary Orthogonal Keying (32-chip) + 1/2-rate CC • Option 8 – 16-ary Orthogonal Keying (32-chip) (with pulse compression) • Option 8a/b/c differ in how close 4 pulses (representing one chip of the 32-chip code) cluster together • Option 9 – 16-ary Orthogonal Keying (128-chip) Francois Chin (I2R)

  6. Receiver Complexity • Option 1, 2, 7 use 1/2–rate Convolution Encoding • Option 8, 9 do not use, instead they have parallel depreader • Complexity ranking: • Parallel despreader for Orthogonal keying < viterbi HD < viterbi SD (in ascending order) • HD x10 < SD • Parallel despreader for Orthogonal keying x5? < viterbi HD Francois Chin (I2R)

  7. Adopted SOP Simulation Scenarios • For each channel realization for the reference link, there is 10 channel realization for the interfering link (one for each of the 10 packets) • Where • C = # chip / symbol • The chip period is 1/ 494MHz • P = 1,…,1000 Francois Chin (I2R)

  8. Adopted SOP Simulation Scenarios • Using Option II non-coherent scheme (PRF=30.875MHz) as example… and C = 256chip / symbol Francois Chin (I2R)

  9. Additional Option of 2nd SOP • For each channel realization for the reference link, there is 10 channel realization for the 1st and 2nd interfering link (one for each of the 10 packets) • Where • C = # chip / symbol • The chip period is 1/ 494MHz • P = 1,…,1000 Francois Chin (I2R)

  10. Scenario with Additional Option of 2nd SOP • Using Option II non-coherent scheme (PRF=30.875MHz) as example… and C = 256chip / symbol Francois Chin (I2R)

  11. Simulation Parameters • Sampling Rate = 494MHz • Simulation Parameters • 1000 packets for each CMx • 10 packets for each of 100 realization channels in CMx for the reference link • Channel realisations - CM1 and CM8 • Includes 1-SOP performance • Types of receiver - Coherent Receiver and Energy Detector • Acquisition assumed for both receivers • Coherent receiver – 4-tap RAKE fingers • ½ rate viterbi decoder – both SD and HD • Non-coherent receiver • simple symbol energy detector for Option I • 1-tap RAKE finger for Option 8 • 4-tap RAKE fingers for Options 2,7,9 Francois Chin (I2R)

  12. Coherent Receiver Performance Francois Chin (I2R)

  13. Common Signaling: AWGN Performance (Coherent) Francois Chin (I2R)

  14. Observation & Comments AWGN performance (Coherent) • Viterbi SD > HD • Option 1~ Option 2 • Option 7 > Option 2 • Both have ½-rate CC • As 4-ary Orthogonal keying > Binary Orthogonal keying • Option 8 ~ Option 9 > Option 7 • As 16-ary Orthogonal keying without ½-rate CC > 4-ary Orthogonal keying with ½-rate CC • Antipodal signaling (coherent mode) the best Francois Chin (I2R)

  15. Common Signaling: CM1 Performance (Coherent) Francois Chin (I2R)

  16. Observation & Comments CM1 performance (Coherent) • Similar to AWGN performance, except ~1.5dB degradation (due to limited RAKE energy capture) • Viterbi SD > HD • Option 2 > Option 1 • Pulses distributed in symbol > pulses cluster together in symbol? • Option 7 > Option 2 • Both have ½-rate CC • As 4-ary Orthogonal keying > Binary Orthogonal keying • Option 8 ~ Option 9 > Option 7 • As 16-ary Orthogonal keying without ½-rate CC > 4-ary Orthogonal keying with ½-rate CC • Antipodal signaling (coherent mode) the best Francois Chin (I2R)

  17. 1-SOP Performance in CM1 (Coherent) Francois Chin (I2R)

  18. 2-SOP Performance in CM1 (Coherent) Francois Chin (I2R)

  19. Observation & Comments 1 & 2-SOP CM1 performance (Coherent) • Viterbi SD > HD • Option 7 ~ Option 2 >< Option 1 • Antipodal signaling (coherent mode) ~ Option 8 ~ Option 9 > Option 7 • For SOP, interference suppression via longer spreading more crucial, i.e. Long spreading + Ortho. Keying > short spreading + conv. coding Francois Chin (I2R)

  20. Common Signaling: CM8 Performance (Coherent) Francois Chin (I2R)

  21. Observation & Comments 1 & 2-SOP CM8 performance (Coherent) • Option 8 ~ Option 9 > Option 7 > Antipodal signaling (coherent mode) > Option 2 > Option 1 • For long channel delay spread, inter-finger-interference suppression via longer spreading more crucial, i.e. Long spreading + Ortho. Keying > short spreading + conv. coding Francois Chin (I2R)

  22. 1-SOP Performance in CM8 (Coherent) Francois Chin (I2R)

  23. 2-SOP Performance in CM8 (Coherent) Francois Chin (I2R)

  24. Observation & Comments 1 & 2-SOP CM8 performance (Coherent) • Option 8 ~ Option 9 > Option 7 > Antipodal signaling (coherent mode) > Option 2 >< Option 1 • For SOP, SOP interference suppression via longer spreading more crucial, i.e. Long spreading + Ortho. Keying > short spreading + conv. coding Francois Chin (I2R)

  25. Summary – Coherent Receiver Performance • longer spreading is crucial for suppressing inter-path-interference, especially for long channel delay spread • longer spreading is crucial for suppressing SOP interference • Longer spread code can be achieved via multiple bit per symbol using orthogonal keying Francois Chin (I2R)

  26. Non-Coherent Receiver Performance Francois Chin (I2R)

  27. AWGN Performance (Energy Detector) Francois Chin (I2R)

  28. CM1 Performance (Energy Detector) Francois Chin (I2R)

  29. 1-SOP Performance in CM1 (Energy Detector) Francois Chin (I2R)

  30. CM8 Performance (Energy Detector) Francois Chin (I2R)

  31. 1-SOP Performance in CM8 (Energy Detector) Francois Chin (I2R)

  32. Recommendation Francois Chin (I2R)

  33. Backup:Modulation Schemes Options Francois Chin (I2R)

  34. Modulation & Coding (Option 7) Bit to symbol mapping: group every 2 coded bits into a symbol (after ½ rate Conv Encoding) Symbol-to-chip mapping: Each 2-bit symbol is mapped to one of 4 32-chip sequence, according to 4-ary Ternary Orthogonal Keying Symbol Repetition: for data rate and range scalability Scrambling: with bipolar sequence @ 30.875MHz, to suppress cross correlation sidelobes due to excessive delay spread Pulse Genarator: Transmit Ternary pulses @ 30.875MHz Coded Bits Pulse Generator Symbol Repetition Symbol- to-Chip Bit-to- Symbol Scrambling {0,1,-1} Ternary Sequence Francois Chin (I2R)

  35. Symbol-to-Chip Mapping (Option 7): Gray coded 4-ary Ternary Orthogonal Keying PBTS Seq #1 1 zero padding Francois Chin (I2R)

  36. Modulation & Coding (Option 8) Bit to symbol mapping: group every 4 information bits into a symbol (No ½ rate Conv Encoding) Symbol-to-chip mapping: Each 4-bit symbol is mapped to one of 16 N-chip sequence, according to 16-ary Ternary Orthogonal Keying Symbol Repetition: for data rate and range scalability Scrambling: with bipolar sequence @ PRFpeak, to suppress cross correlation sidelobes due to excessive delay spread Pulse Genarator: Transmit Ternary pulses @ PRFpeak(either 30.875, 61.75 or 247MHz) Info. Bits Pulse Generator Symbol Repetition Symbol- to-Chip Bit-to- Symbol Scrambling {0,1,-1} Ternary Sequence Francois Chin (I2R)

  37. Symbol-to-Chip Mapping (Option 8): Gray coded 16-ary Ternary Orthogonal Keying Francois Chin (I2R)

  38. Modulation & Coding (Option 9) Bit to symbol mapping: group every 4 information bits into a symbol (No ½ rate Conv Encoding) Symbol-to-chip mapping: Each 4-bit symbol is mapped to one of 16 128-chip sequence, according to 16-ary Ternary Orthogonal Keying Symbol Repetition: for data rate and range scalability Scrambling: with bipolar sequence @ 30.875MHz, to suppress cross correlation sidelobes due to excessive delay spread Pulse Genarator: Transmit Ternary pulses @ 30.875MHz Info. Bits Pulse Generator Symbol Repetition Symbol- to-Chip Bit-to- Symbol Scrambling {0,1,-1} Ternary Sequence Francois Chin (I2R)

  39. Symbol-to-Chip Mapping (Option 9): Gray coded 16-ary Ternary Orthogonal Keying PBTS Seq#1 Francois Chin (I2R)

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