1 / 11

May 8 th , 2008

Energy Recycling Circuit for Leakage Power Reduction Hanh-Phuc Le and Jiashu Chen Motivations - Previous Arts VISU Energy Recycling Converter Analysis and Optimizations of the Circuit Proposals Current detection circuit Leakage power reduction estimation Proposals

aron
Télécharger la présentation

May 8 th , 2008

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Energy Recycling Circuit for Leakage Power Reduction Hanh-Phuc Le and Jiashu Chen Motivations - Previous Arts VISU Energy Recycling Converter Analysis and Optimizations of the Circuit Proposals Current detection circuit Leakage power reduction estimation Proposals Applications and idea of double-recycling Comparison and Conclusions May 8th, 2008

  2. Technology Scaling (α): Vdd  Vdd / α but Idd  Idd * α and density increases α2 Motivations Surging Power Density … … leads to the need for Power reduction techniques PLeakage : 30%-40% Ptotal  Power increase α2

  3. Leakage Power Reduction – Reported Work MTCMOS Dynamic Body Bias Sleep Transistor

  4. De-coupling Capacitor (de-cap) Solutions for Leakage Reduction at De-cap • Zigzag [3-4] • Staking effect • Require more routings and computational efforts. • Savings of 80%-90% K.S. Min (ISSCC 2003) • Charge Sharing [5] • Short 2 virtual rails • Require matched caps • Ideal savings of 50% E. Pakbaznia (2006)

  5. Outlines • Motivations - Previous Arts • VISU Energy Recycling Converter • Analysis and Optimizations of the Circuit • Proposals • Current detection circuit • Energy savings optimization • Leakage power reduction estimation • Applications and idea of double-recycling • Comparison and Conclusions

  6. Variable-Input Step-up (VISU) Converter • Advantages: • Efficiently return energy of the de-cap to Global Vdd. • Suppress residual leakage to be minimum. • No effect on the operation and robustness of the main circuit. • Simple and flexible

  7. Modified Current Detector Y.J. Woo (ISSCC 2008) • Characteristics: • Fast response, accurate • Replicable for PMOS current sense • Simple

  8. Energy Savings - Optimization Saved Energy Available Energy Energy Loss Energy Loss • Performance: • Recycle 59 nJ / 65 nJ available • Effi = 91 % • Fast convergence time: 800ns • Setup: • Decap = 130 nF • L = 2 nH, ESR = 0.2 Ω • 45nm Hi-K CMOS Tech.

  9. Leakage Power Savings Leakage Power Savings versus Idle time Leakage Power Savings versus Idle cycle  reflect Activity factor • Characteristics: • Reach to the discharge speed of no de-cap • Possibly being more aggressive for high activity factor

  10. Proposed to Recycle VISU Converter - Conclusion Idea to Recycle the Energy-Recycling VISU Converter Sleep-mode Energy-Recycling VISU Converter

  11. Professor Bora Nikolic Professor Elad Alon Kevin Mullally and Cory Helpdesk for help in simulation tools. Acknowledgements

More Related