An Introduction to Computer Networks

1. An IntroductiontoComputer Networks Lecture 7: Switch fabric design University of Tehran Dept. of EE and Computer Engineering By: Dr. Nasser Yazdani Introduction to Computer Network

2. Outline • Introduction • What are switches? • Basic concepts • Design factors • Performance factors • Functional requirements • Design architectures Introduction to Computer Network

3. Node incoming links outgoing links Memory Switches • A means to create connectivity • Why switching? Efficient utilization of resources • Store and forward scheme Introduction to Computer Network

4. Basic concepts • An ideal switch: route all incoming packet to their requested outputs with the following conditions: • No loss • Minimum delay • Preserving order • Output contention: At least two input goes to one output. we need buffer and queuing (how much?) • Congestion: no buffer space left. Drop packet Introduction to Computer Network

5. Design Factors • Throughput • Max throughput- N x line speed where N is the # of input line • Ave throughput – At random is %60. • Packet per second (PPS)- # of packets switched per second • Throughput depends on the traffic. • Quality of service: • Ave delay of cells • Jitter • Reliability in switching cells. Introduction to Computer Network

6. Design Factors • Scalability: how the architecture scale, linear? Square? • Regarding the speed of input line • Regarding the # of input port. • Cost: • # of logic gates • Memory • Bandwidth or # of pines Introduction to Computer Network

7. Performance Factors • Traffic pattern: • Packet arrival rate. • Destination distribution • Addressing and operation: • Unicast or multicast operation • Priority- Differentiation among packets Introduction to Computer Network

8. Functional requirement • User plane: • Data is carried transparently • Header are processed and VPI/VCI is used for routing. 0 0 LC SFC IPP LC OPP … … Central unit Introduction to Computer Network

9. Functional requirement • Cntrl plane: Signaling • Identified by VPI/VCI, 5/0 is for call admission. • May use SFC for transporting ctrl packets. IPP+ SFC+ OPP Store and forward system. CAC LC SFC IPP LC OPP … … CAC- Call Admission Control Introduction to Computer Network

10. Functional requirement • Management plane: System Management (SM) must handle management cell. • Should support Network wide operations. • May use SFC for transporting management cells. SM LC SFC IPP LC OPP … … Introduction to Computer Network

11. I/O bus CPU Interface 1 Interface 2 Interface 3 Main memory Workstation-Based switch • Aggregate bandwidth • 1/2 of the I/O bus bandwidth • capacity shared among all hosts connected to switch • example: 800Mbps bus can support 8 T3 ports • Packets-per-second • must be able to switch small packets • 100,000 packets-per-second is achievable • e.g., 64-byte packets implies 51.2Mbps Introduction to Computer Network

12. Switch fabric design • Shared Media • Bus Architecture • Shared buffer • Space division • Cross bar architecture • Combination of above Introduction to Computer Network

13. Bus Architecture • IPP puts cells on bus • OPP buffer cells • Control Processor (CP) • exchanges control messages • configures connections • Bus interconnects various components. » Innonblocking systems bandwidth is equal to sum of external link bandwidths; » bus width must increase with number of links » capacitive loading reduces clock rate as number of links grows Introduction to Computer Network

14. w/n IPP IPP IPP IPP w OPPs Divided Bus with Knockout Concentrators • Split bus into n “minibuses” with w/n wires each • Each minibus driven by justone IPP. • cuts capacitive loading in half • adding fanout componentsallows higher clock frequencies • OPPs concentrate n minibusesonto L<n outputs (optional) • OPPs must each be able tobuffer up to L cells in parallel • Parallel reception complicates control somewhat • Concentration reduces required OPP memory bandwidth Introduction to Computer Network

15. Knockout Switch • Concentrator • select l of npackets • Complexity: n2 Inputs D D D D D D D D D D D D D D 1 2 3 4 Outputs Introduction to Computer Network

16. CP OPP IPP . . . . . . . . . Shared Buffer Switches • For switches with 10 or more links, can reduce required memory by up to an order of magnitude. • Queues are rarely full, then, memory for queues is unused mostly • With shared memory, we can achieve same performance level with less memory. • Requires a central memory with bandwidth equal to twice the external link bandwidth. • Per output or per flow queues typically implemented as linked lists. Introduction to Computer Network

17. crossbar Architecture • crossbar allows multiple cells to pass in parallel to distinct outputs » use of point-to-point transmission eliminates capacitive loading at circuit board level » parallelism reduces data path width at IPPs, OPPs • control circuit arbitrates access to outputs • retains quadratic complexity, but concentrates it within chip, reducing system cost IPP OPP Introduction to Computer Network