1 / 34

Chapter 3 (part 1)

Chapter 3 (part 1). Basic Logic Gates. 1. Introduction. Logic gates are the basic building blocks for forming digital electronic circuitry. A logic gate has One output terminal; One or more input terminals

Télécharger la présentation

Chapter 3 (part 1)

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Chapter 3 (part 1) Basic Logic Gates 1

  2. Introduction • Logic gates are the basic building blocks for forming digital electronic circuitry. • A logic gate has • One output terminal; One or more input terminals • The outputs is either HIGH(1) or LOW(0) depending on the digital levels at the input terminals and the property of the gate • Five basic logic gates • AND, OR NAND, NOR and inverter

  3. 3-1 The AND Gate • The output, X, is HIGH if input A AND input B are both HIGH. • If A = 1 and B = 1, then X = 1. • If A = 0 or B = 0, then X = 0. Schematic symbol of two-input AND gate

  4. Truth table for AND Gate Resultant output All possible input combinations

  5. Figure 3-2 Use AND gate to activate a burglar alarm

  6. Figure 3.3 Electrical analogy for an AND gate (a) using manual switches; (b) using transistor switches.

  7. Boolean equation for AND Gate • Boolean Equation: X = A•B or X = AB • Read as “X equals A AND B” • Can have more than two inputs • Equation 3-1 Number of combinations in truth table = 2N where N = number of inputs

  8. Figure 3-4 Multiple-input AND gate symbols

  9. 3-2 The OR Gate • The output at X will be HIGH whenever input A OR input B is HIGH or both are HIGH • If A = 1 and/or B = 1, then X = 1 • If A = 0 and B = 0, then X = 0 Schematic symbol of two-input OR gate

  10. Truth table for the OR Gate

  11. Figure 3.6 Electrical analogy for an OR gate (a) using manual switches; (b) using transistor switches.

  12. Boolean equation for the OR Gate • Boolean Equation: X = A + B • Read as, “ X = A or B” • Can have more than two inputs • Number of combinations = 2N • N = number of input bits

  13. Figure 3-7 Multiple-input OR gate symbols

  14. Figure 3.8 eight-input OR gate symbol

  15. 3-3 Timing Analysis • Timing diagrams are used to analyze the output response to varying inputs • Oscilloscope • Display plots voltage versus time • Dual-trace can display two waveforms at a time. • Logic analyzer • Can display state tables that show binary levels on signal lines • Can display up to 16 waveforms at a time

  16. 3-4 Enable and Disable Functions • AND and OR gates can be used to enable or disable a waveform from being transmitted from one point to another. • Example: Use a 1-MHz clock oscillator to transmit only four pulses • Solution: Enable four clock pulses to be transmitted, and then disable the transmission from then on.

  17. Enable function using AND gateFigure 3-16

  18. Disable function using OR gate Figure 3-17

  19. 3-5 Using IC Logic Gates • AND and OR gates are available as ICs. • Data Manual from manufacturer includes • IC pin layout, Logic gate type, Technical specifications • Example ICs • 7408(74LS08,74HC08): quad two-input AND gate • 7411(74LS11,74HC11):dual four-input AND gate • 7432(74LS32,74HC32):quad two-input OR gate

  20. Common prefixes and suffixes DIP • Family designation • LS – Lower power TTL family • HC – High-speed CMOS family • (74LS11,74HC11):dual four-input AND gate • Manufacturer • SN: Texas Instruments. E.g., SN7400 • Package style (suffix) • N: plastic dual-in-line package (P-DIP), SN7400N • M: Small-outline Integrated Circuit (SOIC) SOIC

  21. Figure 3.19 The 7408 quad two-input AND gate IC pin configuration. The top side typically has Indented circle / notch cut

  22. Figure 3.20 Using the 7408 TTL IC in the clock enable circuit of Figure 3–17.

  23. Figure 3.21 Pin configurations for other popular TTL and CMOS AND and OR gate ICs: (a) 7411 (74HC11); (b) 7421 (74HC21); (c) 7432 (74HC32).

  24. 3-6 Introduction to Troubleshooting Techniques • Troubleshooting • The procedure used to find the fault or trouble in a circuit. • Tools to test ICs and digital circuits • Logic Probe shows digital levels: Low, High, and floating - open circuit, neither high nor low • Logic Pulser provides digital pulses to a circuit being tested. • Both tools allow you to tell if the pulse signal is getting through the IC as expected.

  25. Gate 3 Gate 2

  26. Gate 4 Gate 1

More Related