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Microprocessor and Microcontroller Based Systems

بسم الله الرحمن الرحيم. The Islamic University of Gaza Faculty of Engineering Electrical Engineering Department. Microprocessor and Microcontroller Based Systems. EELE 4315 — Fall 2010. Instructor: Eng.Moayed N. EL Mobaied. Lecture 12. Interrupt.

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Microprocessor and Microcontroller Based Systems

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  1. بسم الله الرحمن الرحيم The Islamic University of Gaza Faculty of Engineering Electrical Engineering Department Microprocessor and Microcontroller Based Systems EELE 4315 — Fall 2010 Instructor: Eng.Moayed N. EL Mobaied Lecture 12

  2. Interrupt An Interrupt Review • An Interrupt is an external input to the CPU. • The interrupt facility allows the processor to respond rapidly to external changes. When an Interrupt is detected by the CPU, it: • - completes the current instruction, • - stores the address of the next instruction onto the stack, and • possibly other key variables (e.g. contents of Work and Status Register) into (stack or GPR), • - jumps to an interrupt service routine (ISR), whose address is determined by an "interrupt vector".

  3. Interrupt • Many interrupts can be masked, ie disabled, by setting a bit in a control register. • In some processors however (but not PIC), some interrupts are non-maskable. • If an Interrupt is masked, then there is a possibility that it will not be detected. • Therefore there are also Interrupt Flags, bits in SFRs, which are set whenever an associated interrupt occurs. • These record the fact that an interrupt has occurred, even if the CPU is unable to respond to it. • An Interrupt that has occurred, but has not received CPU response, is called a Pending Interrupt. • In the case of several interrupts, one ISR is completed before the next interrupt is responded to.

  4. Interrupt Recalling Interrupt-Related Points that have already Come up The Reset Vector Interfacing with Peripherals Microcontroller Interaction with Peripherals, via SFR and Interrupt Interrupt Routine always starts here

  5. Interrupt • Sources of interrupt: • In the PIC16F84A, there are four source of interrupt: • 1. External interrupt from RB0/INT pin of microcontroller • 2. Interrupt during alteration on RB4, RB5, RB6 and RB7 • pins of port B. • 3. TMR0 interrupt caused by timer overflow. • 4.Termination of writing data to EEPROM.

  6. Interrupt • Registers used with interrupt: • Control interrupt register (INTCON) at 0Bh address. • 2. Option register at 81h address. • 3. Control EEPROM register (EECON 1) at 88h address. • The most important register is (INTCON).

  7. Interrupt • We can use the bits of INTCON register to make interrupt as follow: • 1) First we set GIE bit which must be enabled for any interrupt. • 2) Second we enable one of this bits( T0IE ,EEIE , RBIE,INTE) as we like to use the interrupt: • If we use external interrupt , we set INTE to 1. • If we use RB interrupt , we set RBIE to 1. • If we use TMR0 interrupt , we set T0IE to 1. • If we use EEPROM interrupt , we set EEIE 1. • 3) When interrupt occurred , the one of flag bits (INTF, RBIF, TOIF) is set physically so it must becleared in software.

  8. Interrupt The PIC 16F84A INTCON Register

  9. Interrupt The PIC 16F84A OPTION Register

  10. Interrupt

  11. Interrupt The PIC 16F84A Interrupt Structure Timer Overflow Interrupt Flag External Interrupt Port B Change Note that the interrupt flags are set by the interrupt action, but must be cleared in the program, during the ISR. What happens if this isn’t done? EEPROM Write Complete Global Interrupt Enable External Interrupt input

  12. Interrupt A Generic Interrupt Structure

  13. Interrupt

  14. Interrupt The PIC 16 Series Interrupt Response Note that this diagram shows what the PIC microcontroller itself does as an interrupt occurs. The programmer need not worry about any of these actions, but needs to know that they’re happening.

  15. Interrupt

  16. Interrupt

  17. Interrupt • The step of push and pop is performed because the contents of the most important registers may change during the interrupt. • The most important registers we must keep is the work register and status register and this is done by storing the work and the status registers. • After writing the main body of the interrupt and we can restore the status register then restore the W register

  18. Interrupt • Procedure of recording important registers before going to an interrupt routine is called PUSH, while the procedure which brings recorded values back, is called POP. • PUSH and POP are instructions with some other microcontrollers (Intel), but are so widely accepted that a whole operation is named after them. • PIC16F84 does not have instructions like PUSH and POP, and they have to be programmed.

  19. Interrupt • The contents of W and STATUS registers are stored in W_TEMP and STATUS_TEMP variables (two registers in GPR). • For exchange of data between these registers, SWAPF instruction is used instead of MOVF because it does not affect the status of STATUS register bits.

  20. Interrupt • Example is a program assembler for following steps: • Storing W register in GPR. • 2. Storing STATUS register in GPR. • 4. Executing interrupt routine for interrupt processing (ISR) • 5. Restores STATUS register • 6. Restores W register

  21. Interrupt Flasher on D1 using delay Toggle on D2 using int0

  22. Interrupt

  23. Interrupt

  24. Interrupt • Return from interrupt routine can be accomplished with instructions RETURN, RETLW and RETFIE. • When interrupt was answered, GIE bit was cleared so that any • additional interrupts would be disabled, • It is recommended that instruction RETFIE be used because that instruction is the only one which automatically sets the GIE bit which allows new interrupts to occur.

  25. H.W • Deadline (4/11) • 1- using external interrupt INT0 to implement a counter to counts from 0000 to 1111 at falling edge input • 2- using external interrupt INT0 to implement a counter to counts from 1111 to 0000 at rising edge input • 3- using external INT0 to toggle the flash from 4 leds in portA to a 4 leds in portB • 4- using interrupt technique with tmr0 to implement 1.5sec delay • 5- using interrupt technique with tmr0 to implement 15 u sec delay • 6- using interrupt technique with tmr0 to implement 15 m sec delay

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