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Review

Review. The CPU flags Each instruction affects the CPU flags. The zero flag is set when the result of an operation equal zero. The carry flag is set when an instruction generates a result that is too large (or too small) for the destination operand.

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Review

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  1. Review

  2. The CPU flags • Each instruction affects the CPU flags. • The zero flag is set when the result of an operation equal zero. • The carry flag is set when an instruction generates a result that is too large (or too small) for the destination operand. • The sign flag is a copy of the high bit of the destination operand indicating that it is negative if set and positive if clear. • The overflow flag is set when an instruction generates an invalid signed result. • The parity flag is set when an instruction generates an even number of 1 bits in the low byte of the destination operand

  3. Zero and Sign Flags: • The zero flag is set when the destination operand of an arithmetic instruction is assigned a value of zero. • example: • mov cx,1 • sub cx,1 ; cx = 0, ZF = 1 • mov ax, 0FFFFh • The sign flag is set when the result of an arithmetic operation is negative

  4. Example: • mov cx,0 • sub cx,1 ; CX = -1, SF=1 • add cx,2 ; CX= 1, SF = 0 • Carry Flag: • Carry flag is significant only when the CPU performs unsigned arithmetic. • The result of an unsigned addition operation is too large (or too small) for the destination operand, the carry flag is set. • Example: • mov al, 0FFh • add al,1 ; al = 00, CF= 1

  5. The Overflow flag: • The overflow flag is relevant only when performing signed arithmetic. • It is set when an arithmetic operation generates a signed result that can not fit in the destination operand. • Example: • mov al, +127 • add al, 1 ; OF = 1 • Similarly, • mov al, -128 • sub al, 1 ; OF = 1

  6. Neg Instruction and flag • This can produce an invalid result if the destination operand can not be stored correctly • Example, if we move -128 to al and try to negate it, the value + 128 can not stored in al. • This causes the overflow flag to be set, and an invalid value to be moved to al • mov al, -128 ; al = 10000000b • neg al ; al = 10000000b, OF=1 • On the other hand 1f +127 is negated, the result is valid and the overflow flag is clear. • mov al, +127 ; al = 01111111b • neg al ; al = 1000001b, OF = 0

  7. Boolean and comparison instruction • We are going to begin the study of the conditional processing by working at the binary level, using the four basic operations from the boolean algebra AND , OR, XOR, and NOT.

  8. The AND instruction performs a boolean (bitwise) AND operation between each pair of matching bits in 2 operands and place the result in the destination operann • AND destination, source • The following operand combination are permitted • AND reg, reg • AND reg, mem • AND reg, imm • AND mem, reg • AND mem, imm

  9. The AND instruction is often used to clear selected bits and preserve others. • 00111011 mov a1, 00111011b • AND 00001111 and a1, 00001111b • ------------ • 00001011 • The AND instruction always clears the overflow and carry flag. It modifies the sign, zero, parity flag according to the value of the destination operand

  10. The OR instruction performs a boolean (bitwise) OR operation between each pair of matching bits in 2 operands and place the result in the destination operand. • OR destination, source • The following operand combination are permitted. • OR reg, reg • OR reg, mem • OR reg, imm • OR mem, reg • OR mem, imm

  11. The OR instruction is often used to set selected bits and preserve others. • In the following example, 3Bh is ORed with 0Fh. The lower 4 bits of the result are set and the high 4 bits are unchanged • 00111011 • OR 00001111 • ------------ • 00111111

  12. The XOR instruction performs a boolean (bitwise) XOR operation between each pair of matching bits in 2 operands and place the result in the destination operand. • XOR destination, source • The following operand combination are permitted. • XOR reg, reg • XOR reg, mem • XOR reg, imm • XOR mem, reg • XOR mem, imm

  13. X Y X + Y (X + Y) + Y 0 0 0 0 0 1 1 0 1 0 1 1 1 1 0 1 • Special Quality for XOR is that it reverses itself when applied twice to the same operand. • This reversible property of XOR makes it ideal tool for a simple form of data encryption • Flag: The XOR instruction always clears the overflow and carry flags. It modifies the sign, zero, and parity flags according to the value of the destination operand

  14. parity flag • The parity flag indicates whether the lowest byte of the result of a bitwise or arithmetic operation has an even or odd number of 1 bits. • The flag is set when the parity is even and it is clear when the parity is odd. One way to check the parity of a number without changing its value is to XOR the number with all Zeros: • Mov al, 10110101b ; 5 bits = odd parity • Xor al, 0 ; parity flag clear (PO) • Mov al, 11001100b ; 4 bits = even parity • Xor al, 0 ; parity flag set (PE)

  15. NOT instruction • The NOT instruction toggles all bits in an operand. The result is called 1’s complement. The following operand types are permitted • NOT reg • NOT mem • For example, the 1’s complement of F0h is 0Fh • Mov al, 11110000b • NOT al ; AL = 00001111b • Flag: No flags are affected by NOT instruction

  16. TEST instruction • The TEST instruction performs an implied AND operation between each pair of matching bits in 2 operands and set the flag accordingly. • The difference between TEST and AND operation is that TEST does not modify the destination operand. • The TEST instruction permits the same operand combinations as the AND instructions. • TEST particularly is valuable for finding out if individual bits in an operand is set. • Flags : The TEST instruction always clears the overflow and carry flag. It modifies the sign, zero, and parity flag in the same way as the AND instruction

  17. Example • Testing multiple bits • The test instruction can check several bits at once. • Suppose we want to know if either bit 0 or bit 3 is set in AL register • We can use the following instruction to find this out • TEST al, 00001001b ; test bits 0 and 3 • From the following example, data set we can infer that the zero flag is set only when all tested bits are clear • 0 0 1 0 0 1 0 1 input value • 0 0 0 0 1 0 0 1 test value • 0 0 0 0 0 0 0 1 result value • 0 0 1 0 0 1 0 0 input value • 0 0 0 0 1 0 0 1 test value • 0 0 0 0 0 0 0 0 result value

  18. CMP Instruction • The CMP instruction performs an implied subtraction of a source operand from a destination operand. Neither operand is modified: • CMP destination, source • CMP uses the same operand combinations as the AND instruction. • Flags: the CMP instruction changes the overflow, sign , zero, carry, auxiliary carry, and parity flags according to the destination operand would have had if the Sub instruction were used. For example, as shown, below two operands are compared, the zero and carry flags indicate the relation between operands:

  19. Examples: • Lets look at three code fragments that show how the flags are affected by the CMP instruction. When we put 5 in AX and compare it to 10, the carry flag is set because subtracting 10 from 5 requires a borrow: • Mov ax,5 • Cmp ax,10 ; CF = 1 • Comparing 1000 to 1000 sets the zero flag because subtracting the source from the destination produces zero: • Mov ax, 1000 • Mov cx, 1000 • Cmp cx,ax ;ZF = 1 • Comparing 105 to 0 clears both the zero and carry flags because 105 is greater than 0: • Mov si,105 • Cmp si,0 ZF = 0 and CF = 0

  20. Conditional Jumps • Two steps involve in any conditional jumps. • First, an operation such as CMP , AND or SUB modifies the CPU flags. • Second, a conditional jump instruction tests the flags and causes a branch to a new address. • Example 1: • The CMP instruction campers AL to Zero. The JZ ( jumps if Zero) instruction jumps to label L1 if Zero flags was set by the CMP instruction: • Cmp a1,0 • Jz L1 ;Jump if ZF=1 • : • L1

  21. Each conditional jump instruction checks one or more flags, returning a result of true or false. If the result is true, the jump is taken; otherwise the program skips the jump and conditions to the next instruction. • Limitations: MASM requires the destination of the jump to be a label within -128 to 127 bytes from the jump instruction

  22. Equality comparisons • Based on equality between operands, or value of (E)cx. • CMP destination, Source

  23. Unsigned Comparisons • Jumps based on comparisons of unsigned integers are useful when comparing unsigned values, such as 7FFh and 8000h, where 7FFh is smaller than 8000h latter. • CMP destination, Source

  24. Signed Comparison • It is used when the numbers you are comparing can be interpreted as signed values. • CMP destination, Source • Example: mov al,7Fh ; (7Fh or +127) • Cmp al,80h ; (80h or -128 ) • Ja Isabove ; no: 7Fh not> 80 h • Jg isGreater ; yes: + 127 > -128

  25. MLU Operations • The MUL instruction multiplies an 8-,16-,32-bits operand by either AL,AX,or EAX. The instruction format is: • MUL r/m8 • MUL r/m16 • MUL r/m32 • The result is in EDX and EAX . • EDX sets the flag register if it is not zero ( as the result of operation over flow situation is Eax carries the product of operation. • Will we go through the detail of multiplication and division instruction later on this course.

  26. Example: • TITLE Multiply (AddSub2.asm) • ; This program Multiply two decimal numbers together. We need to put the first operand in eax, the ;second operand in another multi purpose register. The product goes to eax • ; Last update: 2/1/02 • INCLUDE Irvine32.inc • .data • val1 dword 10 • val2 dword 40 • .code • main PROC • mov eax,val1 ; eax=10 • mov ebx,val2 ; ebx=40 • mul ebx ; eax=ebx*eax • call writedec • exit • main ENDP • END main

  27. DIV Instruction • The DIV (unsigned divide) instruction performs 8 bit, 16 bit , and 32 bit division on unsigned integers. • Div r/m8 • Div r/m16 • Div r/m32 • The following illustration shows EDX:EAX as the default dividend when a 32- bit divisor is used. • EDX EAX = eax quotient • r/m32 edx remainder

  28. Example 1: • The following instruction perform 8-bit unsigned division (83h/2), producing a quotient of 41h and a remainder of 1. • mov edx,0 • mov ax, 0083h • mov bl, 2 • div bl • Example 2: • The following instruction perform 16-bit unsigned division (8003h/100h), producing a quotient of 80h and a remainder of 3. • DX contains the high pat of the dividend, so it must be cleared before the div instruction executes. • mov dx, 0 • mov ax, 8003h • mov cx, 100h • div cx

  29. Signed Integer Division • CBW, CWD, CDQ Instructions • Before discussing signed integer division, we need to look at three instructions that perform integer signed extension. • The CBW instruction extends the sign bit of AL into the ah register. This preserves the number’s sign • .data • ByteVal sbyte -101 ; 9Bh • .code • mov al, ByteVal ; AL = 9Bh • cbw ; AX = FF9Bh • In order words, 9Bh and FF9BH both equal -65. The only difference between the two is their storage size

  30. The CWD (convert word to doubleword) instruction extends the sign bit of AX into the DX register • .data • WordVal sword -101 ; FF9Bh • .code • mov ax, WordVal ; AX = FF9Bh • cwd ; DX:AX = FFFFFF9Bh • The CDQ (convert doubleword to quadword) instruction extends the sign bit of EAX into the EDX register • .data • DwordVal sword -101 ; FFFFF9Bh • .code • mov eax, DwordVal • cdq ; EDX:EAX = FFFFFFFFFFFFF9Bh

  31. The IDIV instruction • The IDVI (signed divide) instruction) performs signed integer division, using the same operands as the DIV instruction. • When doing 8-bit division, you must sign-extend the dividend into AH before IDIV executes, (The CBW instruction can be used). • Example: • We divide -48 by 5. After IDIV executes, the quotient in AL is -9 and the remainder in AH is -3. • .data • ByteVal sbyte -48 • .code • mov al, ByteVal ; dividend • cbw ; AL into AH • mov bl, 5 ; Divisor • idiv bl ; AL = -9, AH = -3

  32. 0 CF • Logical Shift vs Arithmetic Shift • There are two basic ways to shift the bits in a number. • The first called a logical shift, fills the newly created bit position with Zero. • In the following diagram, a byte is logically shifted one position to the right. • Note that bit 7 is assigned 0 • For example, if we do a single logical right shift on the binary value 11001111, it becomes 01100111

  33. CF • The other type of shift is called an arithmetic shift. • The newly created bit position is filled with a copy of the original numbers sign bit. • For example, the binary value 11001111, has a 1 in the sign bit. • When shifted, arithmetically 1 bit to the right, it becomes 11100111.

  34. CF • SHL Instruction • The SHL instruction performs a logical left shift on the destination operand, filling the lowest bit with 0. • The highest bit is moved to the carry flag, and the bit that was in the carry flag is lost. • The first operand is the destination and the second is shift count. • SHL destination, count • The following lists the types of operands permitted by this instruction • SHL reg, imm8 • SHL mem, imm8

  35. Example • In the following instructions, BL is shifted once to the left. The highest bit is copied into the carry flag and the lowest bit position is cleared. • mov bl, 8FH ; BL = 10001111b • Shl b1, 1 ; BL = 00011110b, CF = 1

  36. 0 CF • SHR Instruction • The SHR instruction performs a logical right shift on the destination operand, filling the highest bit with 0. • The lowest bit is moved to the carry flag, and the bit that was in the carry flag is lost. • SHR uses the same instruction format as SHL. • In the following example, the 0 from the lowest bit in AL is copied into the carry flag, and the highest bit in AL is cleared. • mov al, 0D0h ; AL = 11010000b • shr al, 1 ; AL = 01101000b

  37. CF • SAL and SAR instructions • SAL (Shift Arithmetic Left) is identical to SHL instruction. • The SAR (Shift Arithmetic Right) instruction performs a right arithmetic shift on its destination operand. • The syntax and operands for SHR and SAR are identical to those for SHL and SHR. • The shift may be repeated, based on the counter in the second operand. • SAR destination, count

  38. Example • The following example, shows how SAR duplicates the sign bit • al is negative before and after it is shifted to the right. • mov al, 0F0h ; al = 11110000b (-16) • sar al, 1 ; al = 11111000b (-8) CF = 0 • Signed Division: You can divide a signed operand by a power of 2 using the SAR instruction. • In the following example, -128 is divided by 2^3. The quotient is -16 • mov dl, -128 ; dl = 10000000b • sar dl, 3 ; dl = 11110000b

  39. CF • ROL Instruction • The ROL (rotate left instruction) shifts each bit to the left. • Also, the highest bit is copied both into the carry flag and into the lowest bit. • The instruction format is the same as for the SHL instruction • Bit rotation differs from bit shifting in that the former does not lose any bits. • A bit that is rotated of one end of a number appears again at the other end.

  40. In the following example, the high bit is copied into both the carry flag and bit position zero • mov al, 40h ; AL = 01000000b • rol al, 1 ; AL = 10000000b ; CF = 0 • rol al, 1 ; AL = 00000001b; CF = 1 • rol al, 1 ; AL = 00000010b; CF = 0 • You can use ROL to exchange the upper (4-7 bit) and lower • (bits 0-3) halves of the byte. • mov al, 26h • rol al, 4 ; AL = 62h

  41. CF • ROR Instruction • The ROR instruction shifts each bit to the right. Also the lowest bit is copied into the flag and into the highest bit at the same time • The instruction format is the same as for SHL • In the following example, the lowest bit is copied into the carry flag and into the highest bit of the result • mov al, 01h ; AL = 00000001b • ror al, 1 ; AL = 10000000b, CF = 1 • ror al, 1 ; AL = 01000000b, CF = 0

  42. CF • RCL and RCR instructions • The RCL (Rotate Carry left) instruction shifts each bit to the left copies the carry flag to least significant bit (LSB), and copies the most significant bit (MSB) into the carry flag. • If you think of the carry flag as just an extra bit added to the high end of the number, then RCL becomes a simple rotate left operation.

  43. RCR Instruction • The RCR (Rotate Carry Right) instruction shifts each bit to the right, copies the right flag into the most significant bit, and copies the least significant bit into the carry flag. • As in the case of RCL, it helps to visualize the integer in this figure as a 9-bit value, with the carry flag to the right of the least significant bit CF

  44. SHLD/SHRD instructions • The SHLD (Shift Left Double) instructions shifts a destination operand a given number of bits to the left. • The bit positions opened up by the shift are filled by the most significant bits of the source operand. • The source operand is not affected, but the sign, zero, auxiliary, parity, and carry flags are affected. • SHLD destination, source, count • The SHRD (Shift Right Double) instructions shifts a destination operand a given number of bits to the right. • The bit positions opened up by the shift are filled by the least significant bits of the source operand. • SHRD destination, source, count

  45. wval AX 9BA6 AC36 BA6A AC36 • Example 1: • The following statements shift wval to the left 4 bits and insert the high 4 bits of ax into the low 4-bit position of wval • .data • wval word 9BA6h • .code • mov ax, 0AC36h • shld wval, ax, 4 ; wval = BA6Ah • The data movement is shown in the following figure

  46. Example 2: • In the following example, ax is shifted to the right 4-bits and the low 4-bits of dx are shifted into the high 4-bit positions of ax • mov ax 234Bh • mov dx, 7654h • shrd ax, dx, 4 ; AX = 4234h DX AX 7654 234B 7654 4234

  47. ADC instruction • The ADC (add with carry flag) instruction adds both a source operand and the content of the carry flag to the destination operand. • The instruction formats are the same as mov instruction. • ADC reg, reg • ADC mem, reg • ADC reg, mem • ADC mem, imm • ADC reg, imm • Example: the following instruction add two 8-bits integers (0FFh+0FFh), producing a 16-bit sum in DL.. AL, which is 01FEh • mov dl, 0 • mov al, 0FFh • add al, 0FFh ; AL = FE • adc dl, 0 ; DL = 01

  48. SBB Instruction • The SBB (Subtract with borrow) instruction subtracts both a source operand and the value of the carry flag from the destination operand. • The possible instruction formats are the same as for ADC instruction. • The following example code performs a 64-bit subtraction. It sets edx:eax to 0000000100000000h and subtracts 1 from this value • The lower 32 bits are subtracted first, setting the carry flag and the upper 32-bit are subtracted including the carry flag • mov edx, 1 ; upper half • mov eax, 0 ; lower half • sub eax, 1 ; subtract 1 • sbb edx, 0 ; subtract upper half • The 64-bit difference in EDX:EAX is 00000000FFFFFFFFh

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