Development System using Altium Designer

Technion – Israel Institute of Technology Department of Electrical Engineering High Speed Digital Systems Lab Development System using Altium Designer Final Presentation One Semester Project “Spring 2007” Supervisor : Ina Rivkin Performed by: Fared Ghanayim Jihad Zahdeh

Project Goals • Learning a new environment in Altium by doing the following: • Building a design using Altium Designer • Knowing different features of Altium Designer • Building the Schematic Diagram • Using VHDL for implementing one of the schematic units and Simulation and Synthesis. • Embedded code. • PCB

Design Block Diagram

Schematic Building Creating a new FPGA Project

Major units we used in schematics and their Libraries

Top level Design LCD Controller LCD Clock SRAM Testmatch SRAM Logic Unit Processor JTAG Testmatch_ent

CPU Diagram with internal Mem. Microprocessor Clock and Reset ports ROM Input Output Ports

VHDL for the logical unit libraryIEEE; useIEEE.Std_Logic_1164.all; useieee.std_logic_arith. all; useieee.std_logic_unsigned. all; entity cont is port ( clk,reset : instd_logic; outs : outstd_logic_vector(7 downto 0); swit : instd_logic_vector(7 downto 0); leds : outstd_logic_vector(7 downto 0); NUM2 : instd_logic_vector(7 downto 0) ); end cont; -------------------------------------------------------------------------------- -------------------------------------------------------------------------------- architecture Structure of cont is begin process(SWIT, NUM2,reset,clk) begin if reset='0' then LEDS<= ( others=>'0'); elsifrising_edge(clk) then outs <= swit; if ((SWIT(0)= '0') and (NUM2(0) = '0')) then LEDS <= (SWIT or NUM2); elsif (SWIT(0) = '0') and( NUM2(0) = '1' )then LEDS <= (SWIT and NUM2); elsif( SWIT(0) = '1') and (NUM2(0) = '0') then LEDS <= (SWIT xor NUM2); elsif (SWIT(0) = '1') and( NUM2(0) = '1' )then LEDS <= not(SWIT); endif ; endif; endprocess; end Structure;

VHDL for Match_SRAM unit LibraryIEEE; UseIEEE.Std_Logic_1164.all; useieee.std_logic_arith. all; useieee.std_logic_unsigned. all; entity match_sram1 isport ( Zz : outstd_logic_vector(15 downto 0); k : instd_logic_vector(7 downto 0) ); end match_sram1; -------------------------------------------------------------------------------- -------------------------------------------------------------------------------- architecture beh of match_sram1 is begin Zz<=k&"00000000"; end beh;

Creating a VHDL TestBench Choose Design->”Create VHDL Testbench”

Required settings for Simulation Before simulation we need to choose the unit we want to simulate and its testbench to do so we choose “Project->Project Options->Simulation” Choosing the tool for simulation Choosing the testbench of the file we want to simulate Choose the module that we want to simulate

Simulation To do simulation for the design choose : Simulator-> Simulate After a successful simulation you get this window in which you can see the input and output signals

Running Simulator From the Simulator menu you can see different options for simulation. You can choose to run the simulation for a defined time or for unlimited time , also you can run simulation step in or step out . And you can choose which signals to show in the simulation.

Simulation for the testcont

Synthesis To synthesis choose : Design-> Synthesis It checks if each part passes synthesis. This window shows that the design passed synthesis successfully.

# include <stdio.h> #define OUTS P0 #define LCD_STROBE P3_1 #define LCD_LINE P3_0 #define LCD_BUSY P3_7 #define LCD_ADDR P2 #define LCD_CHAR P1 #define NUM2 P0 void delay(void); void switched_delay(void); void WriteChar (int line, int addr, int character) ; void WriteBanner (int line) ; void WriteHello (int line); staticconstchar banner[15] = {'F', 'A', 'R', 'I', 'D', '', 'A', 'N', 'D', '', 'J', 'I', 'H', 'A', 'D'}; staticconstchar hello [8] = {'W', 'E', 'L', 'L', 'C', 'O','M','E'}; /*-------------------------------------------------------------------------*/ void switched_delay () { int multi = 0x0008; int sw = OUTS; for (int i = 0; i < sw*multi; i++) {} //read dipswitches and calculate delay } /*-------------------------------------------------------------------------*/ void delay(void) { volatileunsignedint i; for(i=0;i<0xFFFF;i++) __nop(); } /*-------------------------------------------------------------------------*/ void WriteBanner (int line) { for (int i = 0; i<15; i++) { WriteChar (line, i, banner[i]); switched_delay(); } } void WriteChar (int line, int addr, int character) { delay(); LCD_STROBE = 0; // disable the Strobe line on the LCD controller LCD_LINE = line; // set the line on the LCD LCD_ADDR = addr; // set the address LCD_CHAR = character; // write the character while (LCD_BUSY == 1) {} // wait till the LCD is not busy... LCD_STROBE = 1; // enable Strobe to load the character } /*-------------------------------------------------------------------------*/ void WriteHello (int line) { for (int i = 0; i<8; i++) { WriteChar (line, i, hello[i]); switched_delay(); } } /*-------------------------------------------------------------------------*/ void main(void) { //start of main brackets int line = 0; int addr = 0; LCD_STROBE = 0; // ensure that the LCD strobe is low LCD_LINE=0; //enter into first line WriteHello(line=0); WriteBanner(1); while(1) { //start while brackets OUTS=P0; NUM2 = P0; } //end while } //end main brackets Embedded code for The Microprocessor

Automatically Linking the FPGA and PCB Projects First step we convert the FPGA design that we made into a PCB using the “FPGA to PCB project Wizard” which does the converting. To run the wizard choose Tools->”FPGA TO PCB Project Wizard” From the main menu

FPGA to PCB Project Wizard After we press next in the previous window we get this window In this step we choose the devices “Constrain file” that is suitable for our Board Click here to choose your device

Setting the devices We choose the model “FF1152” We choose Virtex 2 pro

The Generated FPGA from the wizard This we get from the Wizard which contains all the inputs and outputs of our FPGA design.

Libraries of PCB components

Schematic design for PCB We add the components to the schematic sheet and connect the outputs to the components following the original FPGA design LCD LEDS Test Button Switches Memory

Choosing the board To open new PCB document we choose New from template in the Files panel. We set the size of the board that we want to build the PCB design on.

Creating PCB Document We chose a sheet size of C and the black part (131.2*179)mm*mm We get the following blank sheet

Using the Layer Stack Manager To run the “Layer Stack Manager” we choose Design-> Layer Stack Manager From Main Menu We choose the number of Electrical layers of the board that we are designing using the “Layer Stack manager”. We took two layers: Top and Bottom layer (Signal Layers).

Setting Non-electric layers We choose the non-electrical layers using the “Board Layers and Colors” panel from the Design Menu. We used the Top Overlay Layer (in the SilkScreen Layers) which it is used to display component outlines and text. We used the Mechanical Layers 13,15,16 which are drawing layers used for fabrication and assembly details such as dimensions. Multi-Layer is used for through-hole pads and vias. Keep Out Layer is used to define the regions where components and routes can validly be placed

Transferring the design from Schematic to PCB 1. Open the schematic document (Manual). 2. Select Design » Import Changes form … .The project compiles and the ECO dialog displays. 3. Click on Validate Changes. If the changes are not validated, close the dialog, check the Messages panel and clear any errors. 4. Click on Execute Changes to send the changes to the PCB. 5. Click Close and the target PCB opens with components positioned ready for placing on the board.

PCB Design before Routing

PCB Design in 3D Before Routing To view Design in 3D choose: View-> Board in 3D

Routing the PCB Design To do The routing we choose Auto Route -> Route All From main menu. We get the following screen and we press on the Route All button.

PCB Design after Routing

PCB Design in 3D After Routing

Specifications of Altium Designer Advantages of Altium Designer: • Design of Analog and Digital circuits. • Schematic Design. • Spice Simulations. • Design and simulation in VHDL and Verilog. • FPGA Design. • Design embedded system microprocessor. • Design of PCB including building and production. Disadvantages of Altium Designer: • We can’t simulate components that doesn’t have simulation models such as Memory , microprocessor , LCD. • It doesn’t have references for all the components it has in its library. • It doesn’t has a wide choice of components for the included libraries in it. • The auto-routing option for the PCB design isn’t that powerful, even if you add more layers to the design.

Thank You

Development System using Altium Designer