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Unit 2

Unit 2. Combining logic gates and arithmetic circuit. State and Prove the De Morgan’s Theorems. Complement of the sum is equal to the product of individuals components. (A+B) = A’.B’ Complement of the product is equal to the sum of individual complements. (AB)’ = A’+B’

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Unit 2

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  1. Unit 2 Combining logic gates and arithmetic circuit

  2. State and Prove the De Morgan’s Theorems. • Complement of the sum is equal to the product of individuals components. • (A+B) = A’.B’ • Complement of the product is equal to the sum of individual complements. • (AB)’ = A’+B’ • Prove by using truth table and circuit diagram.

  3. Combinational Logic Gates • Combinational logic gate is • Inter connection of logic gates to generate a specific logic function, where the inputs result in an immediate output. • Having no memory or storage capabilities. • Digital circuits that have a memory or storage capability are called sequential logic circuit.

  4. Boolean Expressions are of two forms • Sum of products (SOP) –minterms • Product of sum (POS)- maxterms

  5. Constructing circuits from Boolean Expressions.

  6. Truth table and Boolean expressions • Boolean expressions are convenient method of describing how a logic circuit operates. • The truth table is another precise method of describing how a logic circuit works. • Create the Boolean Expression for the given truth tables. • Create the truth table for the given Boolean Expressions.

  7. Karnaugh map • A Karnaugh map is a visual display of the fundamental products needed for a sum-of-products solution. • For instance, here is how to convert Table (1) into its Karnaugh map. Begin by drawing Fig 1(a). • Note the variables and complements: • The vertical column has A’ followed by A, and the horizontal row has B’ followed by B. • The first output 1 appears for A = 1 and B = 0. The fundamental product for this input condition is AB’. • Enter this fundamental product on the Karnaugh map as shown in Fig 1(c).

  8. This 1 represents the product AB’ because the 1 is in row A and column B’. • Similarly, Table (1) has an output 1 appearing for inputs of A = 1 and B = 1. The fundamental product is AB, which can be entered on the Karnaugh map as shown in • Fig1(d). The final step in drawing the Karnaugh map is to enter 0s in the remaining spaces (see Fig 1(e)). In terms of decimal equivalence each position of Karnaugh map can be drawn as shown in Fig 1(b). Note that, Table (1) can be written using minterms as • Y = m (2, 3) and Fig 1(b).represents that.

  9. Three Variable Maps • Here is how to draw a Karnaugh map for Table (2) or for logic equation, • Y = F (A, B, C) = ∑m (2, 6, 7). First, draw the blank map of Fig 2(a).The vertical column is labeled A’B’, A’B, AB and AB’. With this order, only one variable changes from complemented to uncomplemented form (or vice versa) as we move downward. In terms of decimal equivalence of each position the Karnaugh map is as shown in Fig 2(b). Note how minterms in the equation gets mapped into corresponding positions in the map. • Now look for output is in Table (2). Output ls appear for ABC inputs of 010, 110 and 111. The fundamental products for these input conditions are A’BC’, ABC’ and ABC. Enter is for these products on the Karnaugh map (Fig 2(c)). The final step is to enter 0s in the remaining spaces as shown in Fig 2(d).

  10. Four Variable Maps • Many digital computers and systems process 4-bit numbers. For instance, some digital chips will work with nibbles like 0000, 0001, 0010 and so on. For this reason, logic circuits are often designed to handle four input variables (or their complements). This is why we must know how to draw a four-variable Karnaugh map. • Here is an example. Suppose we have a truth table like Table (3). Start by drawing a blank map like Fig 3(a). Notice the order. The vertical column is A’B’, A’B, AB and AB’. The horizontal row is C’D’, C’D. CD and CD’. In terms of decimal equivalence of each position the Karnaugh map is as shown in Fig 3(b). In Table (3) we have output 1s appearing for ABCD inputs of 0001, 0110, 0111 and 1110. The fundamental products for those input conditions are A’B’C’D, A’BC’D, A’BCD and ABCD’. After entering 1s on the Karnaugh map, we have Fig 3(d). The final step of filling in 0s results in the complete map of Fig 3(d).

  11. Pair • In the Fig. 4(a), the map contains a pair of 1s that are horizontal, adjacent (next to each other). The first 1 represents the product ABCD, the second 1 stands for the product ABCD’. As we move from the first 1 to the second 1, only one variable goes from uncomplemented to complemented form (D to D’), the other variables don’t change form (A, B and C remain uncomplemented). Whenever this happens, we can eliminate the variable that changes form.

  12. Quad • A quad is a group of four is that are horizontally or vertically adjacent. That is may be end-to-end, as shown in Fig 5(a), or in the form of a square, as in Fig 5(b). When we see a quad, always encircle it because it leads to a simpler product. In fact, a quad eliminates two variables and their complements.

  13. The Octet • Besides pairs and quads, there is one more group to adjacent is to look for, the octet. This is a group of eight 1s like those of Fig. 6(a). An octet like this eliminates three variables and their complements. Here’s why. Visualize the octet as two quads (see Fig. 6(b)). The equation for these two quads is Y = AC’ + AC

  14. M - Notation • Convert the given expression into M-Notation • Simplify the given F(a,b,c) expressions using K-map and draw the circuit diagram for the simplified expressions.

  15. Conversion of Minterm to Maxterm OR Maxterm to Minterm using De Morgans Theorem. • Steps are : • Change all OR’s to AND’s and all AND’s to OR’s. • Complement each individual variable. • Complement the entire function at a time. • Eliminate all groups of double bars.

  16. Convert the given expressions from Minterm to Maxterm OR Maxterm to Minterm

  17. Binary Addition • 12+8 • 10+3 • Verify the above results

  18. Half Adders • Half adder is a combinational circuit which adds 2 bits and produces two outputs, sum and carry.

  19. Draw the circuit diagram for Half Adder using Basic Gates.

  20. Circuit diagram using NAND gate

  21. FULL ADDER • Full adder is a combinational circuit which adds 3 bits and produces two outputs, sum and carry.

  22. Write the two expressions for sum and carry from the truth table. • Simplify the expression using K-map. • Draw the circuit diagram using only basic gates for the simplified expression.

  23. Full Adder using NAND gates.

  24. 3 – bit Adder • Half adder and full adder are connected to form Adder, which adds several binary bits at a time. • Multiple Adders are used. • Only one half adder for 1’s column and all other bits uses full adders. And these types of adders are called as parallel Adder. • Parallel adder is a combinational logic circuit in which all bits are applied to the input at the same time. And the sum appears as output immediately.

  25. 3 bit Parallel Adder

  26. Binary subtraction • Subtracter is also a combinational circuit. • Two Subtractor • Half Subtractor • Full Subtractor • Half Subtractor • It is a combinational circuit which has two inputs and two outputs as difference and borrow.

  27. Half Subtractor • It is a combinational circuit which has 2 inputs and 2 outputs as difference and borrow. • Truth table of Half Subtractor

  28. Full Subtractor • It is a combinational circuit which has 3 inputs and 2 outputs. • When we subtract several columns of a binary digit, we must take into the account of borrow concept.

  29. Truth table for Full Subtracter

  30. Write the Boolean expression for the full Subtractor. • Simplify the expression by using K-map. • Draw the circuit diagram for the simplified expression.

  31. Parallel Subtractor • Half Subtractor and full Subtractors are wired together to form a parallel Subtractor. • 4-bit parallel Subtractor: • Consists of single half Subtractor and 3 full Subtractor.

  32. IC Adders

  33. Binary Multiplication • 7 X 4 = 28 • Here 7 is Multiplicand • 4 is Multiplier • 28 is Product • Multiplication is nothing but repeated addition process.

  34. 75 X 25 • Addition of multiplicand (75) 25 times which is a long process and takes more time to get the product. • So first multiply the multiplicand by 5, which gives the partial product. • Multiply the multiplicand by 2 which gives the second partial product. • Finally add the partial products to get the actual product. • Same type of the process is used in binary multiplication. • Ex: 111 X 100

  35. Binary Multiplication

  36. This is a block diagram of repeated Addition type multiplication system. • Initially multiplicand is held in the top register. • In our example 7 is (111) the multiplicand. • The multiplier held in the down counter. • In our example 4 is (100) the multiplier. • The lower product register stores the final product. Initially the product register is cleared to 0. • After one count downward, the partial product 111 appears in the product register. • After two count downward, the partial product 1110 appears in the product register.

  37. After three count downward, the partial product 10101 appears in the product register. • After the four count downward, the partial product 11100 appears in the product register. • This type of circuit is not widely used because it takes long time to do the repeated addition. • A more practical method of multiplying in digital electronics circuit, is the ADD and SHIFT method.

  38. ADD & SHIFT method for multiplication

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