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Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design

Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design. Course and contest Results of Phase 1 Eike Schweißguth, Arne Wall. Institute MD, University of Rostock. Choice of Adder Architecture. Normalized Gate Delay x Gate Count. [1]. Adder Architecture - Carry Increment Adder.

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Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design

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  1. Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design Course and contest Results of Phase 1 Eike Schweißguth, Arne Wall Institute MD, University of Rostock

  2. Choice of Adder Architecture Normalized Gate Delay x Gate Count [1]

  3. Adder Architecture - Carry Increment Adder • Principle of Carry Select Adder • Less area than default Carry Select Adder [1]

  4. Multiplier Architecture • 1001 (−7) • * 1101 (−3) • ====== • + 11111001 (1001 * 1) • + 00000000 (1001 * 0) • + 11100100 (1001 * 1) • − 11001000 (1001 * 1) • ========== • 00010101 (+21) • Implementation uses 24Bit*16Bit multiplier • Realized by shift and add operations • Uses our own adder implementation [2]

  5. Results

  6. Outlook • Multiplier Optimization by using CSD and hard wired multiplication • Adder Comparison • Reduce # of filter coefficients • Reduce # of bits of the filter coefficients • Direct Form II

  7. References • [1] Dissertation, „Binary Adder Architectures for Cell-Based VLSI and their Synthesis“, Reto Zimmermann, Swiss Federal Institute of Technology Zurich, 1997 • [2] Website: http://de.wikipedia.org/wiki/Zweierkomplement, called 29.10.13

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