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A Power Grid Analysis and Verification Tool Based on a Statistical Prediction Engine

ICECS 2010 Tools, Techniques & Circuits for Low-Power C onsumer E lectronics. A Power Grid Analysis and Verification Tool Based on a Statistical Prediction Engine. M.K. Tsiampas , D. Bountas , P. Merakos , N.E. Evmorfopoulos , S. Bantas and G.I. Stamoulis. Outline. Motivation

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A Power Grid Analysis and Verification Tool Based on a Statistical Prediction Engine

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  1. ICECS 2010 Tools, Techniques & Circuits for Low-Power Consumer Electronics A Power Grid Analysis and Verification Tool Based on a Statistical Prediction Engine M.K. Tsiampas, D. Bountas, P. Merakos, N.E. Evmorfopoulos, S. Bantas and G.I. Stamoulis

  2. Outline • Motivation • Prior Work • NanoPower • Statistical Prediction Engine • Statistical Prediction Engine in multi mode design • Experimental results • Conclusion

  3. Motivation • Voltage-drop on the power supply network • Ground bounce respectively on the ground network • Cells do not operate with the nominal power/ground supply • Signal integrity issues • Timing • Which is the worst case voltage drop ? • Designer would have to check the voltage drops that occur from the simulation of all possible input vector pairs . . . • Prohibitive amount of simulations for modern ICs that have hundreds of inputs

  4. Prior Work • Vector-less pseudo dynamic methods. • Cannot determine with accuracy relationships between different sinks and formulate them as constraints . • Current constraints have the form of vague upper bounds and thus will only generate a pessimistic upper bound of voltage drop rather than a tight approximation . • These constraints only involve linear relationships between sink currents . • Vector-based methods . • Accurate in calculating voltage drop for this particular vector sequence • Prohibitively large number of all possible input vectors to simulate • No formal methods that provide a set of vectors which is guaranteed to excite the worst-case voltage drops

  5. NanoPower (1/2) • Fast, accurate and reliable prediction of the worst case voltage waveforms over each tap-point of the power supply net of the IC. • Three lynchpin technologies (modules): • An accurate RLCK extraction engine to model the power supply network . • A high capacity digital (gate level) simulation engine with grid awareness . • A statistical prediction engine to estimate the worst case voltage waveforms .

  6. NanoPower (2/2) • NanoPower works internally in an iteration loop between the digital simulator and the linear solver that simulates the power supply network . • 3-5 iterations between the two simulators are enough to converge to within 2-3% of SPICE .

  7. Statistical Prediction Engine (1/3) • Independent approaches so far : • Mostly heuristic or over-simplified • Could not provide the accuracy needed for the design of deep-submicron ICs • A Statistical Prediction Engine based on the Extreme Value Theory • No need to identify and simulate the vector pairs that generate the worst-case voltage drop • Simulate the design for ~2500 random input vectors • Locate the maximal among the points of the sample space S resulted by the 2500 vectors • Shift the maximal points of the sample space S by a computed difference vector d and generate the excitation space D

  8. Statistical Prediction Engine (2/3) • Confidence interval : • Define the interval of the voltage values for each time value in a period where the true worst-case voltage will fall into • Depend on the size of the input vectors set

  9. Statistical Prediction Engine (3/3) • At each via correspond 3 waveforms : • 1 waveform giving the true worst case voltage • 2 waveforms determining the confidence interval

  10. Statistical Engine in Multi Mode Designs • Modern ICs function in multiple modes of operation • The set of all possible input vectors is separated into subsets • Each vector subset forces the design operate in a specific mode • Each mode corresponds to a specific average current consumption • Solution : • A sufficient number of the input vectors for simulation to be part of the right most lobe

  11. Experimental Test and Results • Design : H264 (~ 107000 standard cells ) • Technology : 65nm CMOS technology (TSMC) • Simulation vectors : 3000 (random) • Iterations : 3 • Nominal voltage : 1.0 V

  12. Conclusion • Complete methodology encapsulated in a tool called NanoPower, for power grid analysis and verification • Able to calculate the voltage waveforms for all the vias in a placed and routed design • Predicts the worst case voltage waveforms at each via of the power supply network • Uses a very small, internally generated, subset of the overall possible input vectors set • The Statistical Prediction Engine used by NanoPower is based on solid mathematical foundation

  13. Thank you Questions ?

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