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STICK DIAGRAM

STICK DIAGRAM. EMT251. V. DD. Schematic vs Layout. Out. In. Inverter circuit. GND. V. DD. Schematic vs Layout. 2-input NAND gate. A. B. Out. GND. Stick Diagram. A stick diagram is a graphical view of a layout.

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STICK DIAGRAM

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  1. STICK DIAGRAM EMT251

  2. V DD Schematic vs Layout Out In Inverter circuit GND

  3. V DD Schematic vs Layout 2-input NAND gate A B Out GND

  4. Stick Diagram • A stick diagram is a graphical view of a layout. • Does show all components/vias (except possibly tub ties), relative placement. • Does not show exact placement, transistor sizes, wire lengths, wire widths, tub boundaries.

  5. V V DD DD Stick Diagram • Represents relative positions of transistors • Stick diagrams help plan layout quickly • Need not be to scale • Draw with color pencils or dry-erase markers Inverter NAND2 Out Out In A B GND GND

  6. Stick Diagram Layers Metal (BLUE) Polysilicion (RED ) N-Diffusion (Green) P -Diffusion (Brown) Contact / Via

  7. X PUN C i VDD X B A j PDN GND How to design? Logic Graph / Euler Path A j C B X = C • (A + B) C i A B A B C

  8. Stick Diagram of C • (A + B) A C B A B C VDD VDD X X GND GND

  9. Consistent Euler Path X C i VDD X B A j A B C GND

  10. Example X PUN A C D C B D VDD X X = (A+B)•(C+D) C D B A A B PDN A GND B C D

  11. LAYOUT DESIGN RULES EMT251

  12. 3D View

  13. Design Rules • Interface between designer and process engineer • Guidelines for constructing process masks • Unit dimension: Minimum line width • scalable design rules: lambda parameter • absolute dimensions (micron rules)

  14. Layer Color Representation Well (p,n) Yellow Active Area (n+,p+) Green Select (p+,n+) Green Polysilicon Red Metal1 Blue Metal2 Magenta Contact To Poly Black Contact To Diffusion Black Via Black CMOS Process Layers

  15. Layers in 0.25 mm CMOS process

  16. Intra-Layer Design Rules 4 Metal2 3

  17. Transistor Layout

  18. Vias and Contacts

  19. Select Layer

  20. CMOS Inverter Layout In GND V DD Out (a) Layout

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