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Boolean Algebra and Circuit Simplification Techniques

Learn how to write Boolean equations, simplify circuits using laws and rules of Boolean algebra, and apply DeMorgan's theorem. Design logic circuits using NAND and NOR gates, troubleshoot combinational logic circuits, and reduce complex Boolean equations using Karnaugh mapping.

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Boolean Algebra and Circuit Simplification Techniques

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  1. Chapter 5 Boolean Algebra and Reduction Techniques 1

  2. Objectives • You should be able to: • Write Boolean equations for combinational logic applications. • Use Boolean algebra laws and rules to simplify combinational logic circuits. • Apply DeMorgan’s theorem to complex Boolean equations to arrive at simplified equivalent equations. 2

  3. Objectives (Continued) • Design single-gate logic circuits by using the universal capability of NAND and NOR gates. • Troubleshoot combinational logic circuits. • Implement sum-of-products expressions using AND-OR-INVERT gates. 3

  4. Objectives (Continued) • Use the Karnaugh mapping procedure to systematically reduce complex Boolean equations to their simplest form. • Describe the steps involved in solving a complete system design application. 4

  5. Combinational Logic • Using two or more logic gates to perform a more useful, complex function • A combination of logic functions B = KD + HD • Boolean Reduction B = D(K+H) 5

  6. Discussion Point • Write the Boolean equation for the circuit below: 6

  7. VHDL Proof • A circuit reduction can easily be proved using VHDL • Write a program for each equation • Run a simulation for all possible input conditions • Compare the results

  8. Boolean Laws and Rules • Commutative laws of addition and multiplication: The order of the variables does not matter. • A + B = B + A • AB = BA 7

  9. Boolean Laws and Rules • Associative laws of addition and multiplication • A + (B + C) = (A + B) + C • A(BC) = (AB)C 8

  10. Boolean Laws and Rules • Distributive laws • A(B + C) = AB + AC • (A + B)(C + D) = AC + AD + BC + BD 9

  11. Boolean Laws and Rules • Rule 1: Anything ANDed with a 0 equals 0 • A • 0 = 0 • Rule 2: Anything ANDed with a 1 equals itself • A • 1 = A 10

  12. Boolean Laws and Rules • Rule 3: Anything ORed with a 0 equals itself • A + 0 = A • Rule 4: Anything ORed with a 1 is equal to 1 • A + 1 = 1 11

  13. Boolean Laws and Rules • Rule 5: Anything ANDed with itself is equal to itself • A • A = A • Rule 6: Anything ORed with itself is equal to itself • A + A = A 12

  14. Boolean Laws and Rules • Rule 7: Anything ANDed with its complement equals 0 • A • A = 0 • Rule 8: Anything ORed with its complement equals 1 • A + A = 1 13

  15. Boolean Laws and Rules • Rule 9: Anything complemented twice will return to its original logic level • A = A 14

  16. Boolean Laws and Rules • Rule 10: • A + Ā B = A + B • Ā + AB = Ā + B 15

  17. 16

  18. Discussion Point • Which Boolean laws are illustrated below? • B + (D + E) = (B + D) + E • AB = BA • A + B + C = B + C + A • A(C + D) = AC + AD • What are some strategies for remembering the 10 Boolean rules? 17

  19. Simplification of Combinational Logic Circuits Using Boolean Algebra • Equivalent circuits can be formed with fewer gates • Cost is reduced • Reliability is improved • Use laws and rules of Boolean Algebra 18

  20. Simplification of Combinational Logic Circuits Using Boolean Algebra • Simplify the logic circuit shown by using the appropriate laws and rules. 19

  21. Simplification of Combinational Logic Circuits Using Boolean Algebra • Simplify the logic circuit shown by using the appropriate laws and rules. 20

  22. Using Quartus II to Simplify Equations • Quartus II software determines the simplest form of an equation during compiling. • It eliminates unnecessary gates • Minimizes the number of gates in the FPGA

  23. DeMorgan’s Theorem • Used to simplify circuits containing NAND and NOR gates • A B = A + B • A + B = A B 21

  24. DeMorgan’s Theorem • Break the bar over the variables and change the sign between them • Inversion bubbles - used instead of inverters to show inversion. • Use parentheses to maintain proper groupings • Results in Sum-of-Products (SOP) form 22

  25. DeMorgan’s Theorem • Bubble Pushing 23

  26. DeMorgan’s Theorem • Bubble Pushing • Change the logic gate • (AND to OR or OR to AND) • Add bubbles to the inputs and outputs where there were none and remove original bubbles 24

  27. Truth Tables in VHDL using Vector Signals • Define inputs as an internal signal • Inputs are grouped as vectors • Assign values to the elements of the vector • Assign outputs for each input combination

  28. The Universal Capability of NAND and NOR Gates • The NAND as an inverter. 25

  29. The Universal Capability of NAND and NOR Gates • Forming an AND with two NANDs 26

  30. The Universal Capability of NAND and NOR Gates • Forming an OR with three NANDs 27

  31. The Universal Capability of NAND and NOR Gates • Forming a NOR with four NANDs 28

  32. Discussion Point • The technique used to form all gates from NANDs can also be used with NOR gates. • Here is an inverter: • Form the other logic gates using only NORs. 29

  33. AND-OR-INVERT Gates for Implementing Sum-of-Products Expressions • Product-of-sums (POS) form 30

  34. AND-OR-INVERT Gates for Implementing Sum-of-Products Expressions • Sum-of-products (SOP) form 30

  35. Karnaugh Mapping • Used to minimize the number of gates • Reduce circuit cost • Reduce physical size • Reduce gate failures • Requires SOP form 31

  36. Karnaugh Mapping • Graphically shows output level for all possible input combinations • Moving from one cell to an adjacent cell, only one variable changes 32

  37. Karnaugh Mapping • Steps for K-map reduction: • Transform the Boolean equation into SOP form • Fill in the appropriate cells of the K-map • Encircle adjacent cells in groups of 2, 4 or 8 • Watch for the wraparound • Find terms by determining which variables remain constant within circles 33

  38. Discussion Point • Use a K-map to simplify the circuit. 34

  39. System Design Applications • Use Karnaugh Mapping to reduce equations • Use AND-OR-INVERT gates to implement logic 35

  40. System Design Applications • Use K-maps to simplify less complex circuits before implementing the circuit using an AOI. • More complex circuits are better suited for implementation using PLDs. 36

  41. Summary • Several logic gates can be connected together to form combinational logic. • There are several Boolean laws and rules that provide the means to form equivalent circuits. • Boolean algebra is used to reduce logic circuits to simpler equivalent circuits that function identically to the original circuit. 41

  42. Summary • DeMorgan’s theorem is required in the reduction process whenever inversion bars cover more than one variable in the original Boolean equation. • NAND and NOR gates are sometimes referred to as universal gates, because they can be used to form any of the other gates. 42

  43. Summary • AND-OR-INVERT (AOI) gates are often used to implement sum-of-products (SOP) equations. • Karnaugh mapping provides a systematic method of reducing logic circuits. • Combinational logic designs can be entered into a computer using schematic block design software or VHDL. 43

  44. Summary • Using vectors in VHDL is a convenient way to group like signals together similar to an array. • Truth tables can be implemented in VHDL using vector signals with the selected signal assignment statement. • Quartus II can be used to determine the simplified equation of combinational circuits. 43

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