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Intel Process Technology Gaps

Intel Process Technology Gaps. June 2003. Paula Goldschmidt IE- SBD Mgr. Intel Confidential. Process Manufacturing -Technology Development Key Issues. Technology scaling difficulty increasing New materials/architectures required vs. optional

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Intel Process Technology Gaps

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  1. Intel Process Technology Gaps June 2003 Paula Goldschmidt IE- SBD Mgr. Intel Confidential

  2. Process Manufacturing -Technology Development Key Issues • Technology scaling difficulty increasing • New materials/architectures required vs. optional • More complex core technologies (ie trigate transistors) • Maintain 2 year process development cycle • Increasing levels of process and device integration • External constraints and competition increasing • Declining ASP’s even though capital costs are increasing • Growing competition • Keep One Generation Ahead Leadership Intel confidential

  3. LITHOGRAPHYIS THE MAJOR CHALLENGE

  4. EUV capability Source – VLSI Research Feb 2003, First Call, Company websites Lenses manufacturer EUV light sources manufacturers Track Manuf. Mask manuf. Mask Repair Inspection capab. Mask writing SW New resists Materials for lenses Manufacturing Litho Taxonomy Intel confidential

  5. IntelFocused on Silicon Technology Merging Computing and Communications

  6. Mechanical Wireless Memory Logic Sensors Optical Fluidics Biological Realizing The Vision Excellence in Silicon Research Intel confidential

  7. Intel I/E-SBD Collaboration Objectives: • Enable One Generation Ahead (OGA) through Collaboration: • Collaborate with Academic Research For Early engagement in Process/Tech development. • Time and IP advantage. • Improved supplier execution. • Limited financial downside risk. • Price and royalty benefits of supply. • Collaborate with Start-up/Spin-off companies: • Demonstrate enabling technology to fill Next technologies roadmap gaps • Disruptive technologies to create roadmap options Intel Capital Team Intel Investment body to enable technologies availability Intel confidential

  8. Silicon Technology Gaps • Extend Moore’s Law. Silicon base, varied toppings with new materials and devices • Develop more productive technology • Low power/high speed devices • Continue to introduce a new technology generation every two years Intel confidential

  9. Start Materials Process & Fab Technology Assembly/Test Supply, Capacity & Components I/E-SBD areas of interest TMG Process technology collaboration taxonomy Nanotechnology Alternatives to Silicon MEMS + Intel confidential

  10. Potential Areas of Interest In Si Technologies : 3-5 yrs to Market • Transistor Performance • High K • Low K • Interconnects • Structures • Litho EUV • Masks: manufacturing, cleaning, inspection • Memories • New Materials • New Structures • Nanotechnologies • Application Technologies/Integration into products Intel confidential

  11. MEMSPotential Areas of Interest • Communication Devices • Performance • Reliability • MEMS packaging • Hermetic packaging Intel confidential

  12. How to contact us • Send a Abstract of relevant projects to: • for Assembly/Test & MEMS • Mazal.Shrem@Intel.com • for Litho/Yield/Defects & Clean room • Menachem.Shoval@Intel.com • for Fab & Nanotechnologies • Nati.Fisher@Intel.com • For Investments • David.Hirsch@Intel.com Intel confidential

  13. Thanks Intel confidential

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