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Spin-Torque Switching in Non-Volatile Electronics: Seminar on November 21, 2018

Join Prof. Gengchiau (Albert) Liang from National University of Singapore as he discusses the spin-torque switching mechanism in non-volatile electronics based on the spintronics concept. Learn about potential applications in logic, memory devices, and oscillators. Don't miss this informative seminar!

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Spin-Torque Switching in Non-Volatile Electronics: Seminar on November 21, 2018

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  1. English Lecture Non-volatile Electronics based on Spin-Torque Switching Mechanism National University of Singapore Prof. Gengchiau (Albert) Liang November 21, 2018(Wednesday) pm: 15:30- 16:30 交通大學工程四館Room 108 (NCTU Eng. Building 4) Non-volatile Memory and Computing Seminar Series

  2. Abstract: Some of the brightest minds in electronics engineering have been defeating the “the persevering prediction” of the end of Moore’s Law for nearly two decades now. Unto a decade ago, scaling down the transistor size had helped to simultaneously scale down the cost, decrease the transistor area, pack more functionality on a die, increase the transistor-speed, decrease the load and input capacitance, decrease the voltage and energy consumption per bit operation, until the microelectronics hit the power-wall. Especially, the recent development of electronics device applications is continuously becoming more strongly connected with the advent of Internet of Things (IoT) and machine-to-machine (M2M) communication. These are especially critical for power management to reliably process increasing amount of data for longer periods. Therefore, the development of the low power consumption devices, even for non-volatile electronics, is essentially important for future device applications. Electrons with spin states preserve the unique properties to process and store the information can enable non-volatility at gate, circuit or system level, also affirmed in prototypical systems which successfully attained zero standby power. The binary charge-based logic-state information is translated into two resistance values of a MTJ (Magnetic Tunneling Junction), a fundamental component of spintronics (spin based electronics). In a MTJ, one of the two key magnetic layers is switched (free layer FL)

  3. Abstract (Cont.): between parallel (P) and anti-parallel (AP) state w.r.t. the other layer with fixed magnetization direction (pinned layer PL). Recently, it is discovered that FL switching can be effectuated via different schemes like spin-transfer torque (STT), spin-orbit torque (SOT), and electric field (voltage-controlled magnetization switching VCMS). These effects open the new avenue for novel device operations in logic and memory applications, indicating the new opportunities for non-volatile electronics. Therefore, in this talk, I will give the introduction to spintronics in general, the different spin-torque switching mechanism in MTJs, and then some potential applications in logic and memory devices and oscillators.

  4. Dr. Gengchiau (Albert) Liang / National University of Singapore Dr. Gengchiau (Albert) Liang received the B.S. and M.S. degrees in physics from the National Tsinghua University, Taiwan, in 1995 and 1997, respectively, and the Ph.D. degree in electrical and computer engineering from Purdue University in 2005. He joined the Department of Electrical and Computer Engineering at National University of Singapore as an assistant professor in 2006. Currently, he is the associate professor, the supervisor of computational nanoelectronics and emerging device group, the director of computational nanoelectronics and nanodevice laboratory as well as serves as an area director of microelectronic device and technology in ECE at NUS. His current research topics are focused on modeling and theoretical investigation of advanced 2D materials/devices, non-volatile electronic system based spintronics, low power consumption devices, and nanoscale FETs. He also serves as a committee member for nanotechnology committee under IEEE EDS and a guest editor of IEEE TED (Special Issue on 2D materials and Devices).

  5. English Lecture Moving Towards A Memory Centric Age IIT – Delhi Professor Manan Suri November 21, 2018(Wednesday) pm: 16:30- 17:30 交通大學工程四館Room 108 (NCTU Eng. Building 4) Non-volatile Memory and Computing Seminar Series

  6. Abstract: We are living in an era which is more Memory centric than ever before. Factors that contribute to the ever increasing importance of Memory are – (i) Saturation of Moore’s law, and (ii) Ease of generating enormous amounts of data. The nature of present day data intensive applications is such that, excellence in computational performance cannot be achieved alone on the basis of raw transistor scaling or increasing the number of processing cores. A fundamental shift in the vastly successful Von Neumann computational paradigm is needed to overcome the bottlenecks associated with data-intensive real time applications. This is where next generation advanced Non-Volatile Memory (NVM) begins to play a very significant role. Our research group at IIT-D, has been actively working with a wide variety emerging NVM technologies and their novel emerging applications such as Store, Compute, Sense & Secure. This talk will introduce and outline some of our recent R&D efforts along these directions.

  7. Prof. Manan Suri/ Indian Institute of Technology – Delhi Dr. Manan Suri is an Assistant Professor with the Department of Electrical Engineering, IIT-Delhi. His research interests include Semiconductor Non-Volatile Memory (NVM) Technology and its Advanced Applications (Neuromorphic, AI, Security, Computing, Sensing etc). Dr. Suri has been globally recognized as a leading DeepTech Innovator. He was selected by MIT Technology Review as one of the Top 35 Global Innovators Under 35 (MIT-TR 35 Global List) and one of the Top 10 Indian Innovators Under 35 (MIT-TR 35 India List). Dr. Suri received the prestigious IEEE EDS Early Career Award (2018), Young Scientist Award (2017) from The National Academy of Sciences, Young Engineers Award (2016), from The Institution of Engineers, and Laureat du Prix (2014) from the French Nanosciences Foundation. Dr. Suri has filed several patents, authored 50+ publications and delivered 30+ Invited talks. Dr. Suri’s research group’s work on NVM and Neuromorphic Hardware has been featured in popular media such as MIT Technology Review, Economic Times, QS News, APBN, CNBC, LiveMint, Factor Daily, Campus France, IvyPlus Network, Semiconductor Engineering-USA, etc. Dr. Suri is a visiting scientist at CNRS France. He has also served as an advisor/ steering committee member to some leading AI/Neuromorphic and NVM hardware companies. He has worked at NXP Semiconductors, Belgium and CEA-LETI, France prior to joining IIT-Delhi. Dr. Suri received his PhD from INP-Grenoble, France (2013) and his Masters/Bachelors (2009) from Cornell University, USA.

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