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2013 CAD Contest Technology Mapping for Macro Blocks

2013 CAD Contest Technology Mapping for Macro Blocks. Team: WCYLab -Bach Date: 2013/6/24. Outline. Problem Formulation Main Idea. Input Parser. ABC. D. D.blif. Mapping. ABC. D’.blif. D’.v. Library. VTR. L.blif. Main idea – Library (logical op). Main idea – Library (logical op).

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2013 CAD Contest Technology Mapping for Macro Blocks

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  1. 2013 CAD Contest Technology Mapping for Macro Blocks Team: WCYLab-Bach Date: 2013/6/24

  2. Outline • Problem Formulation • Main Idea

  3. Input Parser ABC D D.blif Mapping ABC D’.blif D’.v Library VTR L.blif

  4. Main idea – Library (logical op)

  5. Main idea – Library (logical op)

  6. Main idea – Library (logical op)

  7. Main idea – Library (arithmetic op) (0, 1, a) Library random, learning L1 L3 L2 NPI < PImax

  8. Main idea – Library (arithmetic op) Adder A a1,b1 Adder 0 0 0 B a2,b2 0 0 0

  9. Main idea – Library (about multi-PO) Library Library

  10. Main idea(New) Library Library Library Library X X X X X

  11. Main idea(New) Library Library Library Library X X X X X (0, 1, a) (0, 1, a) (0, 1, a) (0, 1, a)

  12. Main idea(New) Library Library Library X X X X X (0, 1, a) (0, 1, a) (0, 1, a) (0, 1, a)

  13. Output Parser ABC D D.blif ABC - mapping Mapping D’.blif D’.v Library VTR L.blif

  14. Future work • Alpha test – done • Implementation

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