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Exam 1 Discussion

Outline Problem 1 - modular microcomputer Problem 2 - effective address Problem 3 - range searching Problem 4 - static memory Problem 5 - subroutine call Goal Understand exam questions and answers Reading Microprocessor Systems Design, Clements, Ch. 1-4, 7.5. Exam 1 Discussion.

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Exam 1 Discussion

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  1. Outline Problem 1 - modular microcomputer Problem 2 - effective address Problem 3 - range searching Problem 4 - static memory Problem 5 - subroutine call Goal Understand exam questions and answers Reading Microprocessor Systems Design, Clements, Ch. 1-4, 7.5 Exam 1 Discussion

  2. Problem 1 • memory module • buffers • address decoder • DRAM control • DRAM array • peripherals module • buffers • parallel I/O • serial I/O • timer • disk controller • LAN controller • bus interface • Name 3 modules in modular microcomputer and the major components of one module • figure 1.1 • CPU module • CPU • clock • buffers • MMU • address decoder • buffer control • byte/word control • local memory - buffers, RAM, ROM

  3. What is an effective address and how is it used? the location of an operand, specified via an addressing mode, or implicitly by the instruction definition, e.g. the condition code register is an implicit operand in the M OVE from CCR instruction the operand location can be a register (i.e. register direct addressing mode) or a memory address, possibly restricted by the instruction definition note that the textbook only explicitly defines the effective address for a bit field, which it defines as the base byte, but this is rather vague since a data register can be used as an operand, and the bytes in the registers do not have explicit addresses Problem 2

  4. A 10 x 12 matrix of ptrs to lists of objects intersecting (i,j). Given (i,j), is object there. Base address A, row order, i in D0, j in D1. Lists terminated with NULL ptr. approach: index to location, test for zero, branch indexing code on pp. 43-45 solution MOVEA.L #A,A0 didn’t save old A0 SUBQ.L #&1,D0 i starts at 1 SUBQ.L #&1,D1 j starts at 1 MULU.L #&48,D0 12x4 bytes/row MULU.L #&4,D1 4 bytes per ptr ADD.L D1,D0 D0 is array offset TST.L &0(A0,D0.L) pointer == NULL? BEQ EMPTY NOT_EMPTY Problem 3

  5. What are the main user differences between SRAM, EPROM, flash, EEPROM? All are static, so not a difference All but SRAM are nonvolatile SRAM - fast read/write EPROM - off-line UV erase, slow write Flash - slow block erase/write EEPROM - slow word erase/write, often smart, small Problem 4

  6. Pass ptrs P and Q, save/restore D0,D1,A0,A1, need 200 LW temp data. Show call and return. PEA P pass ptr to P PEA Q pass ptr to Q BSR L1 call procedure L1 LEA &8(SP),SP pop P and Q ... L1 MOVEM.L D0-D1/A0-A2,-(SP) save regs MOVEA.L SP,A2 optional frame ptr LEA &-800(SP),SP or LINK A2,#&-800 ... LEA &800(SP),SP or UNLK A2 MOVEM.L (SP)+,D0-D1/A0-A2 restore regs RTS return Problem 5

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