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Unit 7 Multi-Level Gate Circuits / NAND and NOR Gates

Unit 7 Multi-Level Gate Circuits / NAND and NOR Gates. Ku-Yaw Chang canseco@mail.dyu.edu.tw Assistant Professor, Department of Computer Science and Information Engineering Da-Yeh University. Objectives.

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Unit 7 Multi-Level Gate Circuits / NAND and NOR Gates

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  1. Unit 7Multi-Level Gate Circuits / NAND and NOR Gates Ku-Yaw Chang canseco@mail.dyu.edu.tw Assistant Professor, Department of Computer Science and Information Engineering Da-Yeh University

  2. Objectives • Design a minimal two-level or multi-level circuit of AND and OR gates to realize a given function. • Design or analyze a two-level gate circuit using any one of the eight basic forms. • Design or analyze a multi-level NAND-gate or NOR-gate circuit. Fundamentals of Logic Design

  3. Objectives • Convert circuits of AND and OR gates to circuits of NAND gates or NOR gates, and conversely, by adding or deleting inversion bubbles. • Design a minimal two-level, multiple-output AND-OR, OR-AND, NAND-NAND, or NAND-NOR circuit using Karnaugh maps. Fundamentals of Logic Design

  4. Outline • 7.1 Multi-Level Gate Circuits • 7.2 NAND and NOR Gates • 7.3 Design of Two-Level Circuits Using NAND and NOR Gates • 7.4 Design of Multi-Level NAND and NOR Gate Circuits • 7.5 Circuit Conversion Using Alternative Gate Symbols • 7.6 Design of Two-Level, Multiple-Output Circuits • 7.7 Multiple-Output NAND and NOR Circuits Fundamentals of Logic Design

  5. Outline • 7.1 Multi-Level Gate Circuits • 7.2 NAND and NOR Gates • 7.3 Design of Two-Level Circuits Using NAND and NOR Gates • 7.4 Design of Multi-Level NAND and NOR Gate Circuits • 7.5 Circuit Conversion Using Alternative Gate Symbols • 7.6 Design of Two-Level, Multiple-Output Circuits • 7.7 Multiple-Output NAND and NOR Circuits Fundamentals of Logic Design

  6. 7.2 NAND and NOR Gates • NAND and NOR gates are frequently used • Faster • Fewer components required(in comparison with AND or OR gates) • Important Concept • Any logic function can be implemented using • Only NAND gates or • Only NOR gates Fundamentals of Logic Design

  7. NAND Gate Fundamentals of Logic Design

  8. NOR Gate Fundamentals of Logic Design

  9. Functionally Complete • A set of logic operations is said to be functionally complete if any Boolean functions can be expressed in terms of this set of operations. • AND, OR, and NOT is functionally complete • Any function can be expressed in thesum-of-products form Fundamentals of Logic Design

  10. AND and NOT • Functionally complete • OR can be realized using AND and NOT Fundamentals of Logic Design

  11. OR and NOT • Exercise • Can AND be realized using OR and NOT? Fundamentals of Logic Design

  12. NAND • Functionally complete • NOT, AND, and OR can be realized using NAND Fundamentals of Logic Design

  13. NOR • Functionally complete • NOT, AND, and OR can be realized using NOR • Exercise • Try to draw the NOR gate realization of NOT, AND, and OR Fundamentals of Logic Design

  14. Summary • Functionally complete • AND, OR, and NOT • AND and NOT • OR and NOT • NAND • NOR Fundamentals of Logic Design

  15. Outline • 7.1 Multi-Level Gate Circuits • 7.2 NAND and NOR Gates • 7.3 Design of Two-Level Circuits Using NAND and NOR Gates • 7.4 Design of Multi-Level NAND and NOR Gate Circuits • 7.5 Circuit Conversion Using Alternative Gate Symbols • 7.6 Design of Two-Level, Multiple-Output Circuits • 7.7 Multiple-Output NAND and NOR Circuits Fundamentals of Logic Design

  16. 7.3 Design of Two-Level Circuits Using NAND and NOR Gates • A two-level circuit of AND and OR gates is easily converted to a circuit composed of NAND or NOR gates. • F = (F’)’ • DeMorgan’s laws(X1+X2+…+Xn)’ = X1’X2’…Xn’(X1X2…Xn)’ = X1’+X2’+…+Xn’ Fundamentals of Logic Design

  17. Conversions (I) • A minimum sum-of-productsF = A + BC’ + B’CD = [(A + BC’ + B’CD)’]’ = [A’ · (BC’)’ · (B’CD)’]’ = [A’ · (B’+C) · (B+C’+D’)]’ = A + (B’+C)’ + (B+C’+D’)’ AND-OR NAND-NAND OR-NAND NOR-OR Fundamentals of Logic Design

  18. Eight Basic Forms (I) Fundamentals of Logic Design

  19. Conversions (II) • F = A + (B’+C)’ + (B+C’+D’)’ = { [A + (B’+C)’ + (B+C’+D’)’]’ }’ NOR-NOR-INVERT Fundamentals of Logic Design

  20. Conversions (III) • A minimum product-of-sumsF = (A+B+C)(A+B’+C’)(A+C’+D)= { [(A+B+C)(A+B’+C’)(A+C’+D)]’ }’= [ (A+B+C)’ + (A+B’+C’)’ + (A+C’+D)’ ]’= (A’B’C’ + A’BC + A’CD’)’= (A’B’C’)’ · (A’BC)’ · (A’CD’)’ OR-AND NOR-NOR AND-NOR NAND-AND Fundamentals of Logic Design

  21. Eight Basic Forms (II) Fundamentals of Logic Design

  22. NAND-NOR Gates • Readily available in integrated circuit form • Faster • Fewer components required • Two commonly used circuit forms • NAND-NAND • NOR-NOR Fundamentals of Logic Design

  23. NAND-NAND Circuit • Procedure for designing a minimum two-level NAND-NAND circuit • Find a minimum sum-of-products expression of F • Draw the corresponding two-level AND-OR circuit • Replace all gates with NAND gates leaving the gate interconnections unchanged. If the output gate has any signal literals as inputs, complement these literals. Fundamentals of Logic Design

  24. NAND-NAND Circuit • In general, F is a sum of literals (l1, l2,…) and product forms (P1, P2, …): F = l1 + l2 + … + P1 + P2 + … • After applying DeMorgan’s law, F = (l1’ l2 ’ … P1’ P2’)’ Fundamentals of Logic Design

  25. NAND-NAND Circuit Fundamentals of Logic Design

  26. NOR-NOR Circuit • Procedure for designing a minimum two-level NOR-NOR circuit • Find a minimum product-of-sums expression of F • Draw the corresponding two-level OR-AND circuit • Replace all gates with NOR gates leaving the gate interconnections unchanged. If the output gate has any signal literals as inputs, complement these literals. Fundamentals of Logic Design

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