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Environment Set Up for Synopsys VHDL System Simulator VSS

Environment Set Up for Synopsys VHDL System Simulator VSS. Step –1: a_shehza >source /CMC/ENVIRONMENT/synopsys.env OR a_shehza >cp /CMC/ENVIRONMENT/synopsys.env a_shehza > source synopsys.env OR Create the .cshrc file using Nedit as follows: a_shehza > nedit .cshrc

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Environment Set Up for Synopsys VHDL System Simulator VSS

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  1. Environment Set Up for Synopsys VHDL System Simulator VSS • Step –1: a_shehza >source /CMC/ENVIRONMENT/synopsys.env OR a_shehza >cp /CMC/ENVIRONMENT/synopsys.env a_shehza > source synopsys.env OR Create the .cshrc file using Nedit as follows: a_shehza > nedit .cshrc source /CMC/ENVIRONMENT/synopsys.env .

  2. Step-2: a_shehza > mkdir Synopsys a_shehza > cd Synopsys a_shehza >Synpsys> mkdir Code a_shehza >Synosys> cd Code a_shehza >Synopsys>Code> mkdir Work a_shehza >Synopsys>Code> cp /CMC/ENVIRONMENT/.synopsys_vss.setup . a_shehza >Synopsys>Code> nedit .synopsys_vss.setup

  3. Contents of .synopsys_vss.setup file should be: WORK > DEFAULT DEFAULT: ./Work TIMEBASE = NS

  4. Creating, Analyzing & Simulating VHDL Model a_shehza >Synospsy>Code> nedit& Write the VHDL code and save it as .vhd file(it must be saved in the Code directory) • Analyze the code: a_shehza > Synopsys > Code > vhdlan test.vhd …or a_shehza > Synopsys > Code > gvan test.vhd • Simulation of VHDL model: a_shehza > Synopsys > Code > vhdldbx &

  5. For lab 917,919: >log in to LINUX Change the server to DEA or FBI a_shehza > ssh dea or a_shehza > ssh fbi • Lab Schedules: • Monday : 6:30 pm – 8:00 pm • Wednesday : 8:30 pm – 10:00 pm • Thursday : 8:30 pm – 10:00 pm • a_shehza@ece.concordia.ca

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