Computer Architecture Lecture Notes Spring 2005 Dr. Michael P. Frank

1. Computer Architecture Lecture Notes Spring 2005Dr. Michael P. Frank Competency Area 3: Programming and Coding Methods

2. Instructions • Main goals of this chapter: • To be able to derive binary MIPS instruction code from assembler code • To be able to derive assembler code from C-code representations • We’ll be working with the MIPS instruction set architecture • similar to other architectures developed since the 1980's • used by NEC, Nintendo, Silicon Graphics, Sony • MIPS instruction set architecture will be introduced in a step-by-step approach. By the end of the chapter, you should have a good understanding of the design rules, and be able to analyze MIPS ISA.

3. Instructions • Instructions  Language of the Machine • Instruction Set  “its vocabulary” • More primitive than higher level languages e.g., no sophisticated control flow for branches, loops • Very restrictive e.g., MIPS Arithmetic Instructions * Common design goal among computer designers: maximize performance and minimize cost, reduce design time

4. Instructions • Four design principles will be introduced in this chapter which are important in instruction set architecture design: • Design Principle 1: Simplicity favors regularity. • Design Principle 2: Smaller is faster. • Design Principle 3: Good design demands good compromise. • Design Principle 4: Make the common case fast!

5. MIPS Arithmetic • In MIPS assembly language, all instructions have 3 operands only • Destination operand and 2 source operands. • Instructions can perform only one operation at a time. • However, pipelined and superscalar implementations may execute multiple instructions simultaneously. • Operand order is fixed (destination first):Example: C code: A = B + C MIPS code: add A, B, C • A “#” symbol marks the start of a comment, • Comments are ignored by the compiler.

6. MIPS Arithmetic • MIPS architecture philosophy is to keep the hardware simple, since complex instructions require more physical hardware resources to implement (space, time, energy costs). • This constraint has been becoming less important as transistors shrink. • ***Design Principle 1: “Simplicity favors regularity.” However, simplicity in the ISA design can lead to a larger size for compiled code. C code: f = (g+h) – (i+j); MIPS code: add t0, g, h add t1, i, j sub f, t0, t1

7. MIPS Arithmetic • Symbolic variable notation is used in previous examples. • However in MIPS architecture, only registers can be used as operands. • Registers are 32 bits  “word ” length • There are 32 registers available (for integer arithmetic) in the MIPS architecture. • The registers (almost) all behave the same. • Simple, regular program design & HW implementation.

8. MIPS Arithmetic MIPS register conventions: Note: Register $r1 is reserved for use by the assembler and Registers $r26-$r27 are reserved for the operating system.

9. MIPS Arithmetic *** Design Principle 2: smaller is faster. • Why? • Having a large number of registers will increase clock cycle time (longer wires, more RC delay) • Recall that having a smaller clock cycle time will improve performance! • Effective use of the principle is key to computer performance ; • Computer designer must balance the programmer’s desire for more registers with the need for a minimal clock cycle time. • Programmers also should worry about this… • A program that uses less memory will often run faster. • Less cache contention, virtual memory not needed.

10. Registers versus Memory • Arithmetic instructions’ operands must be registers, • No arithmetic instructions operate directly on memory contents • Only 32 registers are provided. • Revisit earlier example: • C Code: f = (g+h) –(i+j); • Modified MIPS code: add $t0,$s1,$s2 #Register $t0 contains g+h add $t1,$s3,$s4 #Register $t1 contains i+j sub $s0,$t0,$t1 #Reg. $s0 gets $t0-$t1=(g+h)(i+j); • What if we have more than 32 variables in our program? • Must transfer values to and from mainmemory to work with them. • We can access single variables, arrays, and other data structures • located on the stack, • in statically allocated memory, • or on a dynamically-allocated heap.

11. Registers versus Memory • How can a computer represent and manipulate large data structures, such as arrays? • Recall processor contains only small amount of data in registers, but memory can contain millions (even billions) of data elements. • Data transfer instructions (load/store) allow the CPU to transfer data between registers and memory. • To access a word in memory, the instruction must specify a memory address (location).

12. 3 100 registers 2 10 1 114 Processor 0 1 address data Memory Organization • Memory can be viewed as a large, 1-dimensional array. • A memory address serves as an index into the array. • “Byte addressing” means that there is a unique index for each individual byte (8 bits) of memory. Memory Data transfer

13. Recall from last time… • The instruction set architecture (ISA) of a machine can be thought of as the hardware’s “user interface.” • Where by “users” here we mean software engineers, such as compiler writers and assembly language programmers. • We are studying the MIPS instruction set architecture; • MIPS is a reduced instruction set computer (RISC), which allows for simplified hardware. • Recall, design principle 1: “Simplicity favors regularity ”. • MIPS has 32 registers, each 32 bits long. • As opposed to hundreds of registers in some architectures. • Design Principle #2: “Smaller is faster” • Hence improved performance through reduced clock cycle time.

14. Memory Organization • Recall, that a list of many data elements are stored in an array. • To access these elements (i.e. memory locations) we use data transfer instructions: load and store. • The data transfer instruction that moves data from memory to a register is called load. • Think “Load the data into the CPU for processing.” • Like “Load the dishes into the dishwasher for cleaning.” • In MIPS the actual instruction is “lw”for load word. • Other load instructions transfer data of different sizes. • To transfer data from registers to memory, use store. • Think “Store the data back in memory after processing.” • Like “Store the dishes back in the cabinet after washing.” • MIPS: Use “sw” for “store word.” • You can think of memory as essentially a large 1-dimensional array, with the address acting as an index into that array.

15. 12 100 8 10 4 114 … … 0 1 address data Memory Memory Organization • Example: The address of the third word in the following array is 8 and the value of Memory[8]=10. * This is an example of byte addressing in which the index refers to a byte of memory. Since words are 32 bits long, the memory address increments by 4 so that words will always start at addresses that are a multiple of 4. This requirement is known as alignment restriction; it can help to speed up data transfers.

16. Memory Organization Consider the following example: Assume that A is an array of 100 words and the compiler has associated registers $s1 and $s2 with the variables x and y. Also assume that the starting address, or base address is contained in register $s3. Determine the MIPS instructions associated with the following C statement: x = y + A[8]; // adds 8th element in array A to y and stores result in x Solution: Before we can perform any arithmetic operations, we must first transfer the data contained in A[8] to a temporary register. lw $t0, 32($s3) # $s3 contains the base address of array and # 32 is the offsetaddress of the 8th element add $s1, $s2, $t0 # performs addition

17. Memory Organization Note that machines can use different “endian-ness” conventions to order bytes within a word. Starts withthe “big” end! Starts withthe “little” end! Little Endian Big Endian Byte # Byte # aa+1 a+2 a+3 Address: aa+1 a+2 a+3 • Sun SPARC • Machintosh (PPC)- MIPS • DECStation 3100 Machines • Intel 80x86 family From Gulliver’s Travels: “Gulliver finds out that there is a law, proclaimed by the grandfather of the present ruler, requiring all citizens of Lilliput to break their eggs only at the little ends. Of course, all those citizens who broke their eggs at the big ends were angered by the proclamation. Civil war broke out between the Little-Endians and the Big-Endians, resulting in the Big-Endians taking refuge on a nearby island, the kingdom of Blefuscu.”

18. Memory Organization • If a machine uses byte-addressing with 8-bit addresses, how many different byte locations can be accessed? • If 32-bit-long byte addresses are used, how many different aligned 32-bit word locations can be accessed? • (Do as an in-class exercise.) Memory locations with addresses ranging from 0 to 255 (Hint: Memory locations increment by 4=22.)

19. Memory Organization Example Example (using load and store) Assume that A is an array of 100 words and the compiler has associated registers $s1 with the variable x. Also assume that the base address of the arrayis in register $s2. Determine the MIPS instructions associated with the following C statement: A[12] = x + A[8]; Solution: lw $t0, 32($s2) add $t0, $s1, $t0 sw $t0, 48($s2) NOTES: (1) Store word instruction has destination last as last element. (2) Remember arithmetic operands are registers only, not memory!

20. Memory Organization Example Example (using variable array index) Assume that A is an array of 100 elements and the base is in $s3. Also assume that the compiler associates g, h, and i with $s1, $s2, and $s4. Determine the MIPS instructions associated with the following C statement: g = h + A[i]; Solution: We need to know that address of the A[i] before we can load it into a temporary register. Recall, that to access an element in memory we must multiply it by 4 to account for byte addressing. To accomplish this we perform the following sequence of operations: 4i  First, i + i = 2i then 2i + 2i = 4i add $t1, $s4, $s4 # temp register holds 2i add $t1, $t1, $t1 # temp register holds 4i add $t1, $t1, $s3 # $t1 holds address of A[i] lw $t0, 0($t1) # loads A[i] into temp register $t0 add $s1, $s2, $t0

21. Recap… • MIPS — loading words but addressing bytes — arithmetic on registers only • InstructionMeaningadd $s1, $s2, $s3 $s1 = $s2 + $s3sub $s1, $s2, $s3 $s1 = $s2 – $s3lw $s1, 100($s2) $s1 = Memory[$s2+100] sw $s1, 100($s2) Memory[$s2+100] = $s1 • In programs containing more variables than registers, the compiler tries to keep the most frequently used variables in registers and the rest in memory. This process is known as spilling. Why is this important to system performance?

22. Machine Language • Both numbers (data) and instructions are stored in computer hardware as high and low electronic signals (e.g. binary signals). • MIPS Assembly Instructions are converted into machine language using a sequence of 1’s and 0’s (a.k.a machine code.) • MIPS Instruction Format: • Composed of different segments called fields • Instructions are exactly 32 bits long • Same size as a data word

23. Machine Language • MIPS Instruction Format: • Op: Opcode – the basic operation of the instruction • Rs: First register source operand • Rt: Second register source operand • Rd: register destination operand • Shamt: Shift amount (explained in Chapter 4) • Funct: Function – selects the specific variant of the operation in the opcode

24. Machine Language • Design Principle #3: Good design demand good compromise! • Thus, all MIPS instructions have the same length (32 bits) but different formats are used: (1) R-Type (for Register) (2) I-Type (for data transfer type functions) Bit allocation for R-type format: Bit allocation for I-type format:

25. Machine Language • Examples: (i) add $t0, $s1, $s2 In decimal representation: In binary representation: (ii) lw $t0, 32($s3) In decimal representation: Binary representation: (do on own)… Where’s the compromise?

26. Machine Language • Appendix A (on the CD-ROM), pages A-50 through A-81, gives format for assembly language instructions in the third edition. • Example: For the given C statement, determine its MIPS assembly code, as well as, its corresponding machine code. Assume that the base address for A is contained in $s2. A[100] = x + A[50]; (do on own)

27. Memory Accounting Program Editor Program Processor C Compiler Code Payroll Account memory for data, programs, compilers, editors, etc. Book Text Stored-Program Concept • Since instructions are represented as numbers, programs can be stored in memory to be read just like data. • This idea leads to the stored-program concept, which allows a computer to execute different programs that are stored in memory.

28. Instructions for Decision-making • Decision making instructions: • Computers have the ability to make decisions. • The “next” instruction to be executed depends on the outcome of the decision. • Many programming languages use the if statement and/or the goto statement to represent decision-making. • MIPS language uses conditional branch instructions (branch if equal, branch if not equal):(1) bneregister1,register2,L1- go to statement labeled L1 if value in register 1 does not equal value in register 2 (2) beq register1, register2, L1 - go to statement labeled L1 if value in register 1 equals value in register 2

29. Control Flow Examples Example: For the given C statement, assume that variables f through j correspond to registers $s0 through $s4. What is the compiled MIPS code? if (i == j) goto L1; f = g + h; L1: f = f - i; Solution: We’ll need a branch if equal(beq) statement to correspond to the ‘if’ command: beq $s3, $s4, L1 add $s0, $s1, $s2 # skipped if i==j Now we just have to identify the code for the label L1. Consider, if the conditional branch is true, then the add instruction is skipped. How do we specify the label such that the last instruction is always executed?

30. Control Flow Examples • In stored-program computers, instructions are stored in memory, • thus they are identified using memory addresses. • L1 will correspond to the address of the subtract instruction. L1: sub $s0, $s0, $s3 • Complete solution: C Code: if (i == j) go to L1; f = g + h; L1: f = f - i; MIPS assembly: beq $s3, $s4, L1 add $s0, $s1, $s2 L1: sub $s0, $s0, $s3

31. Control Flow Examples Example: For the given C statement, assume that variables f through j correspond to registers $s0 through $s4. What is the compiled MIPS code? if (i == j) f = g + h; else f = g - h; MIPS Code: bne $s3, $s4, else add $s0, $s1, $s2 j exit else: sub $s0, $s1, $s2 exit: Unconditional Branchis used; the machine always takes (follows) this branch. MIPS uses “j” for “jump” to distinguish it from conditional branches.

32. Unconditional Branches • We can use MIPS unconditional branch instructions to implement if-else statements, as well as for and while loops using the format: j label • Example:if (i!=j) beq $s4, $s5, Lab1 h=i+j; add $s3, $s4, $s5else j Lab2 h=i-j; Lab1: sub $s3, $s4, $s5 Lab2: ... i=j i≠j i=j

33. Unconditional Branches Example (while loop): Write the MIPS assembly code for the following C code segment. Assume that i, j, k correspond to $s3, $s4, $s5 and the base of the array SAVE is contained in $s6. while (save [i] = = k) i = i + j; Solution loop: add $t1, $s3, $s3 add $t1, $t1, $t1 add $t1, $t1, $s6 lw $t0, 0($t1) bne $t0, $s5, exit add $s3, $s3, $s4 j loop exit:

34. Control Flow Examples • We looked at beq, bne,and j what about other conditional statements? SLT: Set-on-less-than Compares two registers, if first register is less than second then it sets destination to 1, otherwise destination register contains 0. * We use this for case/switch statements. 2

35. Summary • Arrays, byte addressing, alignment restriction • Machine language conventions (big and little endian) • Instruction format types (R-type and I-type) • Stored program concept • Decision-making instructions, conditional and unconditional branches • Next time: case/switch statements,supporting procedures in computer hardware, arrays versus pointers, etc… 2

36. Recall from last time… • Memory Organization • Machine Language • Instruction Formats • Decision-making Instructions; Control Flow • Conditional Branches Today… • Case/Switch statements using branches • Procedures • MIPS addressing modes • Arrays versus pointers

37. Case/Switch Statements • Case/Switch statements are used in many programming • languages to allow the user to select one of many choices. • It can be implemented as a sequence of if-then-else • statements. • We can also use a jump address table to encode • alternatives. The program will index the table and them • jump to the appropriate instruction sequence. • MIPS uses a jump register (jr) instruction to identify • the proper address of the jump table.

38. Case/Switch Statements Example Assume the variables f through k correspond to $s0 through $s5 and register $t2 contains 4. What is the associated MIPS code for the following switch statement written in C? switch (k) { case 0: f = i + j; break: /* k = 0 */ case 1: f = g + h; break: /* k = 1 */ case 2: f = g - h; break: /* k = 2 */ case 3: f = i - j; break: /* k = 3 */ } k is an index that contains the address of the instruction to be executed.

39. Example cont… k should equal 0, 1, 2, or 3 to enter the jump address table, if it doesn’t then it should exit the switch command: slt $t3, $s5, $zero # test if k < 0 bne $t3, $zero, Exit # Exit if k <0 slt $t3, $s5, $t2 # test if k > 4 beq $t3, $zero, Exit # Exit if k 4 Convert k to a byte address: add $t1, $s5, $s5 add $t1, $t1, $t1 # $t1 = 4k  offset Assume that 4 sequential words in memory, starting at an address contained in $t4, have addresses corresponding to the labels L0, L1, L2, and L3. Then we load the proper jump address as add $t1, $t1, $t4 # $t4  base address lw $t0, 0($t1) # $t0 contains address of instr jr $t0 # jump to address in reg $t0 Case/Switch Statements

40. Case/Switch Statements Example cont… Next define the labels L0, L1, L2, and L3: L0: add $s0, $s3, $s4 j Exit L1: add $s0, $s1, $s2 j Exit L2: sub $s0, $s1, $s2 j Exit L3: sub $s0, $s3, $s4 Exit:

41. Case/Switch Statements Complete Example C Code: switch (k) { case 0: f = i + j; break: /* k = 0 */ case 1: f = g + h; break: /* k = 1 */ case 2: f = g - h; break: /* k = 2 */ case 3: f = i - j; break: /* k = 3 */ } MIPS Assembly Code: slt $t3, $s5, $zero # test if k < 0 bne $t3, $zero, Exit # Exit if k <0 slt $t3, $s5, $t2 # test if k < 4 beq $t3, $zero, Exit # Exit if k > 4 add $t1, $s5, $s5 add $t1, $t1, $t1 # $t1 = 4k  offset add $t1, $t1, $t4 # $t4  base address lw $t0, 0($t1) # $t0 contains address of instr jr $t0 # jump to address in reg $t0 L0: add $s0, $s3, $s4 # define instructions for Case 1 j Exit L1: add $s0, $s1, $s2 # define instructions for Case 2 j Exit L2: sub $s0, $s1, $s2 # define instructions for Case 3 j Exit L3: sub $s0, $s3, $s4 # define instructions for Case 4 Exit: # End of statement

42. Supporting Procedures • A procedure is a tool that is used to structure programs to make them easier to understand and to reuse. • There are 6 steps to be followed when executing a procedure: • Place parameters in a place where procedure can access them; • Transfer control to the procedure; • Acquire the storage resources needed for the procedure; • Perform the desired task; • Place the result in an accessible place; • Return control to the point of origin.

43. Supporting Procedures • MIPS allocates special registers for supporting procedures and procedure calling: • $a0 - $a3  argument registers to pass parameters • $v0 - $v1  value registers to return values • $ra  return address register to return to origin • Also, an instruction just for procedures is used jump-and-link (jal) instruction; it jumps to an address and saves the address of the following instruction in the $ra register. • jal ProcedureAddr • The “link” portion stores the return address in $ra: • Return addr = PC + 4 Program Counter

44. Procedures • Note: • Procedure calls preserve registers $s0 - $s7 (saved registers) and erase values stored in temporary registers $t0 - $t7. • Nested procedures are also possible. All of the registers that are needed in the caller program are pushed onto the stack. • Example: • Determine the MIPS assembly code for the following C code: • int leaf_example(int g, int h, int i, int j) • { • int f; • f = (g + h) – (i + j); • return f; • }

45. Procedures • Recall MIPS Code for the statement: • f = (g + h) – (i + j); • add $t0, $s1, $s2 # register $t0 contains g+h • add $t1, $s3, $s4 # register $t1 contains i+j • sub $s0, $t0, $t1 # register $s0 contains $t0-$t1= (g+h) –(i+j); • We’re going to create a subroutine around this operation. Since we’re passing arguments, we must use argument registers $a0 - $a3 for the variables g through j. We’ll use $s0 for variable f. • add $t0, $a0, $a1 # register $t0 contains g+h • add $t1, $a2, $a3 # register $t1 contains i+j • sub $s0, $t0, $t1 # register $s0 contains $t0-$t1= (g+h) –(i+j);

46. Procedures • Recall we’re using a LIFO structure/stack so we must store the values contained in the $t0, $t1, $s0 registers initially: • sub $sp, $sp, 12 • sw $t1, 8($sp) • sw $t0, 4($sp) • sw $s0, 0($sp) • Next we can load our code for our operation: • add $t0, $a0, $a1 • add $t1, $a2, $a3 • sub $s0, $t0, $t1 • The return value for f is copied to the return value register: • add $v0, $s0, $zero # returns f ($v0 = $s0 +0) • Restore old values in registers that we saved initially: • lw $t1, 8($sp) • lw $t0, 4($sp) • lw $s0, 0($sp) • add $sp, $sp, 12

47. AFTER Procedure Call BEFORE Procedure Call DURING Procedure Call Contents of $t1 Contents of $t0 $sp $sp $sp Contents of $s0 Procedures Finally we use a jump register instruction to go to the return address: jr $ra • The Stack Pointer always points to the “top” of the stack or the last word in the stack. • “Push”ing registers onto stack ensures that the stack above $sp is preserved.

48. Procedures MIPS Assembly • Putting it all together… • C Code: • int leaf_example(int g, int h, int i, int j) • { • int f; • f = (g + h) – (i + j); • return f; • } sub $sp, $sp, 12 sw $t1, 8($sp) sw $t0, 4($sp) sw $s0, 0($sp) add $t0, $a0, $a1 add $t1, $a2, $a3 sub $s0, $t0, $t1 add $v0, $s0, $zero lw $t1, 8($sp) lw $t0, 4($sp) lw $s0, 0($sp) add $sp, $sp, 12 jr $ra • Note: • Since $t0 and $t1 are temporary registers and are not typically • preserved during a procedure call, we can drop the 2 stores and • 2 load commands. What is the updated code? (on own)

49. Procedures • The stack is used to store contents of registers as well as to store local variables that are local to the procedure. • The segment of the stack that contains the procedure’s saved registers and local variables is called the register frame or activation record. • A frame pointer ($fp) points to the first word of the frame of a procedure. It can be used as a stable base register within a procedure to access local memory references. Its use is optional. BEFORE Procedure Call DURING Procedure Call AFTER Procedure Call $fp $fp Saved Arg regs $fp Saved rtn addr $sp Saves Sve regs $sp Local arrays and data structures $sp

50. Representing Text • We process numbers, as well as, text using the American Standard Code for Information Interchange (ASCII) character representation. • Recall that ASCII characters are represented using 8 bits = 1 byte. • MIPS instructions allows us to move bytes from words using load byte (lb) –loads a byte from memory and places it in rightmost 8 bits of a register; and store byte (sb) – takes a rightmost byte from register and places it into memory. • We can copy a byte with the following sequence: • lb $t0, 0($sp) # Read byte from source • sb $t0, 0($gp) # Write byte to a destination