1 / 15

TPC Electronics Meeting - RCU DataFlow - Bernardo Mota 13/01/05

TPC Electronics Meeting - RCU DataFlow - Bernardo Mota 13/01/05. Summary. Current Status Configuration & Dataflow Overview Trigger Issues Pushed Readout Popped Readout Sparse Readout Pedestal Memories Test-Mode Macros & Useful Sequences Future Work. Current status.

sammy
Télécharger la présentation

TPC Electronics Meeting - RCU DataFlow - Bernardo Mota 13/01/05

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. TPC Electronics Meeting - RCU DataFlow - Bernardo Mota 13/01/05 TPC Electronics Meeting

  2. Summary • Current Status • Configuration & Dataflow • Overview • Trigger Issues • Pushed Readout • Popped Readout • Sparse Readout • Pedestal Memories • Test-Mode • Macros & Useful Sequences • Future Work TPC Electronics Meeting

  3. Current status • Full Verilog design has been successfully synthesized in Xilinx ISE6.3i • Introduction of START/STOP pointers in PMWRITE/PMREAD • Test-Mode feature implemented and tested with BC • Sparse readout implemented and tested with BC • Selection of 3 trigger sources (I2C, TTC, command) • Readout Popped architecture meant for USB and DCS TPC Electronics Meeting

  4. ALTRO Interface Master Switch Configuration & Data Flow : Overview Optical RCU board 40 Data Assembler SIU Board A SIU Interface 32 B MEM Branch A Ethernet DCS Interface Branch B DCS Board A Slow Control I2C B Trigger Interface TPC Electronics Meeting

  5. ALTRO Interface Configuration & Dataflow: Trigger Issues RCU board SIU Board SIU Interface • Drift Time (TW) • Buffers Full • Not in ACQ mode L1b+L2b Branch A COMMAND Filter External connection L1_connector Master Switch L1b+L2b Branch B DCS Interface DCS Board Slow Control Trigger Interface L1_ttc TPC Electronics Meeting

  6. ALTRO Interface Master Switch Configuration & Dataflow: Pushed Readout RCU board Data Assembler SIU Board xoff Branch A data_valid 40 SIU Interface Branch B DCS Interface DCS Board Slow Control Trigger Interface TPC Electronics Meeting

  7. ALTRO Interface Master Switch Configuration & Dataflow: Popped Readout RCU board Data Assembler SIU Board Branch A SIU Interface Branch B END DCS Interface DCS Board READY Slow Control Trigger Interface TPC Electronics Meeting

  8. ALTRO Interface ALTRO BC Configuration & Dataflow: Sparse Readout RCU board Branch A [Event Length] 40 [List of non-zero data channels] • Procedure • RCU bcasts SCAN command to all BCs • BCs scan EVL from ALTROs • RCU requests list of participating channels • RCU uses list to launch selective readout TPC Electronics Meeting

  9. Active Channel List 16bit = 1 ALTRO chip 1: Good 0: Non-working 256 words Channel not working will not be readout FEC Readout List Updated by Slow control 32bit = max number of FEC / RCU Configuration & Dataflow: Active Channel List TPC Electronics Meeting

  10. ALTRO Interface =? • PMREAD • Pedestal Data from ALTRO is sent to Result MEM • Content is compared with Pedestal MEM • PMWRITE • Data in Pedestal MEM in RCU is sent to ALTRO • Specific channel or broadcast Configuration & Dataflow: Pedestal Memories RCU board ALTRO PED MEM Result MEM start Pedestal MEM stop TPC Electronics Meeting

  11. ALTRO Interface Configuration & Dataflow: Test-Mode • Procedure • RCU sends READ command to BC • BCs put ALTROs in testmode • RCU waits before send acquisition request • BC sends data through the ALTRO bus • BC Parameters • Number words [0..511] • Undersampling ratio [16bit] • ADC address RCU board ALTRO [ADC data] 40 BC [ADC data] TPC Electronics Meeting

  12. Add. JUMP/LOOP N loops 4’h0 WAIT END TRIGGER Nbr. Cycles CLK 16’hxxxx 16’hxxxx 4’h9 4’ha 4’hb 19 16 15 8 7 19 19 19 0 0 0 0 channel add. PMREAD 4’hx 4’h7 19 16 15 12 11 0 Configuration & Dataflow: Macro-instructions 16 15 chann. add. bcast PMWRITE 3’hx 4’h8 19 16 15 13 12 11 0 TPC Electronics Meeting

  13. WRITE ‘N’ REG JUMP *END* PMREAD PMWRITE READ ‘N’ REG Accessing in infinite loop a given ALTRO Register Pedestal Memory Test Scope probing for electrical integrity check Checking ALTRO Pedestal memory access in a fast way Configuration & Dataflow: Useful Sequences TPC Electronics Meeting

  14. TRIGGER TRIGGER *END* WAIT (t1) WAIT (t2) LOOP (N times) L1 L1 L1 L2 L2 L2 .. .. .. TW TW TW readout readout readout Configuration & Dataflow: Useful Sequences Trigger Sequence Generator t1 t2 TPC Electronics Meeting

  15. Future Work • Implement 50MHz readout • Test popped readout from DCS • (successful test with USB RCU) • Benchmark system-level behavior • n-RCU system: trigger alignment, clock distribution • Extensive data verification in high-trigger rate conditions TPC Electronics Meeting

More Related