Front-end Electronics for CMS Preshower detector

1. Front-end Electronics for CMS Preshower detector Physics Motivation PACE Architecture PACE Performance without sensor PACE Performance with sensor Apollo Go National Central University, Taiwan March 28, 2002

2. Physics Motivation: Higgs Search • One of the most important goal of LHC is the search of Higgs. • For a Higgs mass <140GeV, • Hgg is the main decay mode • Important to be able to reject p0 gg The endcaps have higher particle density => ECAL towers are not fine enough => need a fine grain Preshower Apollo Go, NCU Taiwan

3. Location within CMS • Two layers of absorber, each followed by a layer of silicon strip sensors (layers are orthogonal). Dynamic range: 400 MIPs Apollo Go, NCU Taiwan

4. Preshower Micromodule Apollo Go, NCU Taiwan

5. Preshower Readout Architecture Apollo Go, NCU Taiwan

6. Front End Electronics: PACE • PACE is the combination of 2 chips in DMILL technology: • Delta • Preamp with leakage current compensation. • Switched gain shaper. Low gain (400 MIP) for physics, high gain (50 MIP) for calibration. • Programmable biasing and calibration pulse via internal DACs. • PACE-AM • 32 channels, 160 columns analog pipeline. 24 deep FIFO. • Programmable biasing, latency, mux freq., modes of operation. • LVDS inputs for 40MHz clock, LV1 and ReSynch. • I2C inputs for parameter loading Apollo Go, NCU Taiwan

7. Sample 1 2 3 Time 32 channels latency 160 columns write pointer read pointer PACE II Signal Shape and Path 3 samples per every trigger are saved and readout, enabling full reconstruction of the signal on the read-out electronics. Apollo Go, NCU Taiwan

8. PACE II Multi-Chip Module First “full functional” pre-production chips was produced in 2001. The result is presented. Delta 3.5 x 6 mm2 PACE AM 9.6 x 6.4 mm2 Apollo Go, NCU Taiwan

9. Readout Motherboard Microcontroller (with I2C interface) FIFOs ADC Daughterboard + PACE Altera FLEX FPGA RS232 port All we need is an RS232 port. Slow but simplifies functionality test and characterization process greatly! Apollo Go, NCU Taiwan Sept. 3, 2001

10. Analog Pipeline Uniformity Channel to channel pedestal vs. pipeline cell are similar except a DC shift => a possible way of pedestal correction Pedestal can be corrected using either single cell or shape+DC shift look up table Apollo Go, NCU Taiwan

11. Analog Pipeline Noise High Gain: ~7 ADC counts (1.75 mV) Low Gain: ~3.5 ADC counts (0.85mV) Get ~2 ADC counts (LG) and ~5 ADC counts (HG) after common mode substraction (see next slide) Apollo Go, NCU Taiwan

12. Linearity, Gain and Noise Using internal calibration injection, gain and noise ona fixed pipeline cell after pedestal and common mode substraction: High Gain Low Gain Will improve when loaded by sensor Gain= 15.77 mV/MIP Noise = 1 mV Gain= 2.32 mV/MIP Noise = 0.52 mV S/N~16 S/N~4.6 Apollo Go, NCU Taiwan

13. Rise time (10%-90%) ~15.5ns (LG), ~18ns (HG) Shaping time ~25ns Pulse Shape • Map pulse shape with internal calibration pulses combined with external programmable delay lines (250ps resolution) Apollo Go, NCU Taiwan

14. With Sensor: Set-up Readout Board • Wire-bonded with the final silicon strip detector (Cin~50pF) • Set up with radioactive source to see real particle response: Scintillator Silicon Sensor 106Ru Source Delta+PACE Apollo Go, NCU Taiwan

15. With Sensor: The MIP Entries • Find the MIP from particles in radioactive source: Double gaussian fit Ped: -0.01 ±7.0 ADC cnts MIP: 39.0 ±12.6 ADC cnts S/N = 5.6 Signal [ADC] S/N will get better with better grounding and with 3 time samples etc. Apollo Go, NCU Taiwan

16. With Sensor: Calibration HG Use high precision (HP) injection pulse to map the MIP and low precision (LP) to extend to the full dynamic range. Use high gain to measure Physics MIP and inter-calibrate to full dynamic range with low gain (LG). Output [ADC] LG Signal [MIP] Overlap between two gains to inter-calibrate Apollo Go, NCU Taiwan

17. With Sensor: Gain & Dynamic Range Knowing the MIP from source, one can inject calibration pulses to get the gain and the dynamic range: Due to injection DAC saturating, not the preamp. Dynamic range > 400 MIP. ADC saturating, not critical Only lower range (0-50 MIPs) is used in the calibration. Apollo Go, NCU Taiwan

18. With Sensor: Linearity High Gain The gain is fairly constant across the required dynamic range Low Gain Apollo Go, NCU Taiwan

19. Output [ADC] Time [ns] Rise-time ~20ns With Real Detector: Pulse Shape • By delaying the coincidence of trigger with respect to the phase of the sampling clock, we can map out the pulse shape: Apollo Go, NCU Taiwan

20. Conclusion • Preliminary tests of DMILL PACE2 look very promising. • Radiation hardness study. • Test beam at PSI planned for May for high rate study. • will test several tens of chips to measure the yield before a decision about DMILL PACE • Present DMILL version needs in any case one more iteration • Fix any bugs in PACE2 • increase pipeline length from 160 to 192(?) requested by Trigger • modified chips will be submitted in 05/2002 • Started backup design in 0.25 microns technology (in collaboration with IPN-LYON, RAL) back up in case of poor DMILL yield. submission 07/2000 Apollo Go, NCU Taiwan