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Towards the Formal Verification of a Java Processor in Event-B

Towards the Formal Verification of a Java Processor in Event-B. Neil Evans and Neil Grant AWE, Aldermaston. Motivation. The Scalable Core processor (Score) is a hardware implementation of a JVM Instruction Set Architecture (ISA) level instructions are Java bytecodes

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404 views • 32 slides

First Order Logic

First Order Logic. Logic is a mathematical attempt to formalize the way we think. First-order predicate calculus was created in an attempt to mechanize reason. First Order Logical Representations. All zombies eat brains.

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481 views • 18 slides

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Towards the Formal Verification of a Java Processor in Event-B

First Order Logic