'Sequential arrays' diaporamas de présentation

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Lecture 9: Memory Hierarchy (3)

Lecture 9: Memory Hierarchy (3). Michael B. Greenwald Computer Architecture CIS 501 Fall 1999. Improving Cache Performance. Average memory-access time = Hit time + Miss rate x Miss penalty (ns or clocks) Improve performance by: 1. Reduce the miss rate, 2. Reduce the miss penalty, or

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Merging Arrays Example

Merging Arrays Example. /* Before: 2 sequential arrays */ int val[SIZE]; int key[SIZE]; /* After: 1 array of stuctures */ struct merge { int val; int key; }; struct merge merged_array[SIZE]; Reducing conflicts between val & key; improve spatial locality. Loop Interchange Example.

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