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Header Definitions

Access to DSP GPIO Pins (General Purpose I/O). Header Definitions. Access to DSP Address bus and control bus. Access to DSP Data bus and ground pins. Header Definitions (continued). CPLD JTAG for programming an Altera EPM3064ALC44-10 CPLD if populated.

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Header Definitions

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  1. Access to DSP GPIO Pins (General Purpose I/O) Header Definitions Access to DSP Address bus and controlbus Access to DSP Data bus and ground pins

  2. Header Definitions (continued) CPLD JTAG for programmingan Altera EPM3064ALC44-10CPLD if populated Access to DSP Analog to Digital Converter (ADC) Access to CPLD pins (actual EPM3064ALC44 pin number)

  3. Jumper Definitions This position used when powering using Ext Pwr (+5V) Header This position used when powering from XDS-100 USB This position used when powering from DSP UART USB Jumpersbetween DSP signals and hardwired CPLD pins

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