EEE 435 Principles of Operating Systems

1. EEE 435Principles of Operating Systems Virtual Memory Pt I (Modern Operating Systems 4.3)

2. Quick Review • What are the two basic memory management schemes we saw? • How do we keep track of what sections of memory are in use when swapping processes in and out of memory Capt MWP LeSauvage

3. Outline • Virtual Memory background • Paging • Page Tables Capt MWP LeSauvage

4. Background • Our use of Swapping has allowed us to place multiple programs into memory concurrently, but has not addressed the problem of a program too large for memory • The solution that arose is known as virtual memory. The idea is that we will keep part of the program in memory and part on the disk • Now a 16MB program can be run on a computer with only 4MB of RAM! Capt MWP LeSauvage

5. Background • Recall that, in general, we will compile programs relative to address zero and change those addresses during execution with the use of a base register • For the section of virtual memory, this remapping will be performed by a piece of hardware known as the Memory Management Unit (MMU) • The MMU will take addresses from the process and transform them into the actual address in RAM Capt MWP LeSauvage

6. Background • Addresses provided to the MMU will be known as virtual addresses or logical addresses • These terms will be used interchangeably • The MMU will produce a physical address • The physical address is an address in RAM Capt MWP LeSauvage

7. Paging • Processes believe they can access the entire memory provided to them based on the number of address lines in the hardware • For a 32bit system, this is 232, or 4GB • This is known as the virtual address space • To provide “sections” of memory that can be moved between disk and physical memory we will divide the virtual address space into chunks called pages • The corresponding physical page is a Page Frame Capt MWP LeSauvage

8. Paging • 16-bit addresses result in a VA space of 64KB • This particular computer has only 32KB of RAM • The MMU maps virtual addresses used by the CPU into physical addresses which are put onto the bus Capt MWP LeSauvage

9. Paging • Misses (the Xs) mean that the page is not in memory and the MMU TRAPs to the OS so that the page can be loaded • This is known as a Page Fault • When this happens the OS loads the new page into a page frame (possibly evicting a page frame already in use) and updates the MMU with the new information • The place where this information is stored is known as a Page Table Capt MWP LeSauvage

10. Page Tables • The page table stores a number of entries, one for each page in virtual memory, indicating if and where that page is located in physical memory (note that one page table will be required for each process!) • Consider a 16-bit address with 4KB pages • 4KB=212, so that leaves 24=16 virtual pages to be mapped Capt MWP LeSauvage

11. Page Tables Incoming Virtual Address 16 Entries Outgoing Physical Address Capt MWP LeSauvage

12. Page Tables (Example) Incoming Virtual Address (8196) Outgoing Physical Address (24,580) Capt MWP LeSauvage

13. Page Tables • What does each entry in the page table require? • Present bit (so we know if we need to go to disk...also called Valid bit) • Dirty bit (so we know if the page must be written back to the disk when swapped out. Also called Modified bit) • Used bit (helps us decide on which page to swap out...we’ll see more of that on page replacement algorithms) Capt MWP LeSauvage

14. Page Tables • What does each entry in the page table require? • Caching Disabled bit – used to indicate that references to this page should always come from memory, not the cache • Used when devices are mapped to memory • Disk address of page – If the frame is not present in memory then this is where the page is located on the disk • There are other places this information could be held, but this is a pretty handy spot! Capt MWP LeSauvage

15. Page Tables • What does each entry in the page table require? • Protection bits – Can specify what the user is allowed to do with the page ie: read/write/execute • Typical sizes for page table entries will be 16, 32, or 64 bits Capt MWP LeSauvage

16. Page Tables • So where is the page table information held? • For small page tables (16 to 1024 entries) it could be in registers in the MMU • Recall that this will require that the OS changes the MMU with the new memory map for the new process every context switch • However, for a 32-bit address space and 4KB pages, the number of entries in the page table is ONE MILLION!!! • If a single entry is 32 bits that requires 4MB of space for the table...one veeerryy expensive computer! Capt MWP LeSauvage

17. Page Tables • Where else could the page table information be held? • In main memory • Slower than registers • On the disk • Way too slow for our purposes, but we’ll cheat, more info, next class! • A combination thereof • A mix of registers, memory, and disk can be used in a system known as multi-level paging. More info, next class! Capt MWP LeSauvage

18. Quiz Time! Questions? Capt MWP LeSauvage