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Physical tamper Resistance

Physical tamper Resistance. Chapter report by Eustace asanghanwa. Overview of talk. Ross Anderson on Physical Tamper Resistance Chapter report Critique Commentary on Tamper Resistance since 2000. Key take-away. A well-grounded understanding of the concept of tamper resistance.

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Physical tamper Resistance

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  1. Physical tamper Resistance Chapter report by Eustace asanghanwa Eustace Asanghanwa

  2. Overview of talk • Ross Anderson on Physical Tamper Resistance • Chapter report • Critique • Commentary on Tamper Resistance since 2000 Eustace Asanghanwa

  3. Key take-away A well-grounded understanding of the concept of tamper resistance Eustace Asanghanwa

  4. Ross Anderson on physical tamper resistance Security engineering, 1 edition chapter 14 Eustace Asanghanwa

  5. Historical attack techniques Eustace Asanghanwa

  6. Security Processor examples Eustace Asanghanwa

  7. Attacker classification Eustace Asanghanwa

  8. Attacks on smartcards Protocol Analysis Anti-tearing Cover VPP Single stepping Micro probing Memory linearization Cryptographic co-processor interfaces FIB through shields Eustace Asanghanwa

  9. State of ART Security Architecture • State of Art • Defense in depth (eliminate single points of failure) • Tamper resistance versus tamper evidence • Stop loss • What goes wrong • Architectural errors - Trusted card in an untrusted platform • Security by obscurity targets IP protection • Protocol failure from dangerous combination of commands • Function creep as in multiuse cards Eustace Asanghanwa

  10. Benefits of TamPERrESisTANT DEVICES Control information processing by linking to single physical token Assures data destruction at a definite and verifiable time Reduce the need to trust human operators Control value counters Eustace Asanghanwa

  11. critique • Good • Comprehensive on evolution of tamper resistance. • Grasp on security principles. • Opportunities for improvement • Smartcard-centric. • Some recommendations not consistent with provided principles e.g. • Recommends “Using a proprietary (and complicated) encryption algorithm…” after recommending against home-brewed encryption schemes. • Techniques behind times even for year 2000. Eustace Asanghanwa

  12. Conclusion Security Engineering offers a good comprehensive history on tamper resistance with attention to security principles. Threat, tamper resistance, and evaluation techniques have evolved since publication of the first edition. I expect significant updates in the chapter on physical tamper resistance in the second edition (still awaiting my copy from Amazon). Eustace Asanghanwa

  13. Personal commentary ON Physical Tamper resistance Eustace Asanghanwa

  14. What is tamper Resistance? Assuring achievement of security goals at all times Guiding Principles Assume capable adversaries Increase cost of analysis Reduce value of compromise Eustace Asanghanwa

  15. Since 2000 [1st Edition Security Engineering] • Stronger adversaries • Hackers are smarter • Markets are wider fueling motivation • Analysis equipment are more affordable • Industry demands openness in techniques • More professional analysis labs thanks to patent litigations • Greater rigor on security evaluation • Revision of FIPS PUB140-1 to FIPS PUB 140-2 in 2002 • Common Criteria (ISO/IEC 15408) major version revision from 2 to 3 currently at version 3.1. Eustace Asanghanwa

  16. FIPS 140-2 Eustace Asanghanwa

  17. Common modern day threats • Micro-probing • Security protocols • Algorithm exploits • Operational environment • Operations timing • Bug exploits Eustace Asanghanwa

  18. Critical elements for Success in IC tamper Proofing Courtesy Wikipedia Eustace Asanghanwa

  19. Recap • Tamper resistance is about achieving security goals at all times • Described technology-based methods are common but don’t have to be • Other tamper proofing methods may include: • Legislation (e.g. in banking networks) • Cultural actions e.g. shaming • Secured premises Eustace Asanghanwa

  20. Thank you Eustace Asanghanwa

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