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A 1 V RF front -end for both HIPERLAN2 and 802.11a

A 1 V RF front -end for both HIPERLAN2 and 802.11a. T. Taris , JB. Begueret, H. Lapuyade, Y. Deval IXL laboratory, University of Bordeaux 1, 33405 Talence, France. OUTLINE. HIPERLAN2 and 802.11a requirements Wireless mass market design constrains LNA MIXER RF Front -end

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A 1 V RF front -end for both HIPERLAN2 and 802.11a

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  1. A 1 V RF front-end for both HIPERLAN2 and 802.11a T. Taris, JB. Begueret, H. Lapuyade, Y. Deval IXL laboratory, University of Bordeaux 1, 33405 Talence, France

  2. OUTLINE • HIPERLAN2 and 802.11a requirements • Wireless mass market design constrains • LNA • MIXER • RF Front-end • Measurement results • Conclusions

  3. HIPERLAN2 and 802.11a requirements Mixer LNA VGA PBF PBF LO

  4. Wireless mass market constrains Wireless applications + Mass market CMOS VLSI analog design Power aware systems Low Power/Low Voltage <10 mW / ~1V

  5. LNA Ftot = FLNA+(Fmixer-1)/GLNA Inputmatching Low noise figure Low power & Low voltage Maximum signal collected Ftot = FLNA+(Fmixer-1)/GLNA Gain

  6. LNA Tuned Load Good Linearity Reduce Miller Effect out Lg MLNA RF bias Ls Inductive Degeneration Low Noise Figure 50 input matching

  7. Mixer Principle efficiency Mixing operation Gain Low power & Low voltage Mixing principle brought into play Voltage dynamic range trade-off Linearity

  8. Mixer Low-pass filter behavior High-pass filter behavior VFI VLO bias VRF In saturation region: Assuming:

  9. FI R R RF LO RF Front-End Cd2 Rconv Cd1 Mmix MLNA LNA Mixer

  10. Measurement results S11 = -26 dB Isolation LO>RF = -34 dB • Inductive degeneration matching • Due to closeness of RF and LO port

  11. Measurement results Gain (dB) 10 9 8 7 6 5 4 3 2 1 Supply Voltage (V) 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 Gain = 10 dB @ 1 V ICP1=-9 dBm & IIP3=0 dBm • Good input matching • Architecture well suited to low voltage • Efficiency of resistor load • Bypass filter behavior

  12. Measurement results

  13. Conclusions • Fulfill successfully bothHIPERLAN2 and 802.11a requirements • Operating under 1V and consuming only 6 mA, it is well suited to low power/low voltage applications • implemented in CMOS VLSI technologie its weak bulkiness (750µm500µm ) dedicates it to System On a Chip (SOC) applications

  14. Perspectives • Improve isolation between LO and RF port • Architecture without inductance (matchingtrade-off) • Enhance the conversion gain (linearity trade-off)

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