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CSE 291-a Interconnection Networks

CSE 291-a Interconnection Networks. Lecture 7: February 7, 2007 Prof. Chung-Kuan Cheng CSE Dept, UC San Diego Winter 2007 Transcribed by Thomas Weng. Topics. Circuit Switching - Definitions: Nonblocking, rearrangeable, strict. Crossbar Clos Networks. 1. x. x. x. 2. x. x.

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CSE 291-a Interconnection Networks

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  1. CSE 291-aInterconnection Networks Lecture 7: February 7, 2007 Prof. Chung-Kuan Cheng CSE Dept, UC San Diego Winter 2007 Transcribed by Thomas Weng

  2. Topics • Circuit Switching - Definitions: Nonblocking, rearrangeable, strict. • Crossbar • Clos Networks

  3. 1 x x x 2 x x x n x x x Crossbar • n inputs, n outputs, n2 switches • Rearrangeable, strict and wide nonblocking • If n is small, this is usually the best choice. 1 2 n

  4. Physical layout (what to do with many nodes?) Control (packet switching) Paper - BlackWidow: High-Radix Clos Networks, S. Scott, D. Abts, J. Kim, W.J. Dally 1 2 n 1 2 3 n Engineering Issues

  5. Physical Layout (example) 8x8 crossbar 1 . . . . . . . . 8 . . . . . . . Goes to row 1, row 2, … , row 8 8 wires per row 64 horizontal wires 64 wires in between each signal 8x64 vertical wires in all 64 8x8 switches

  6. Clos Network: Three Stage Clos(m,n,r) n x m n n 1 1 1 n n 2 2 2 . . . . . . . . . n n r m r

  7. Clos Network (continued) • rn inputs, rn outputs • 2rnm + mr2 switches (this is less than r2n2) Clos(m,n,r) is rearrangeable iff m >= n Let m = n • rn inputs 2rn2 + nr2 switches = (2n + r)rn (a crossbar is rn2 switches) Optimal choice of n and r?

  8. Clos Network - Proof Proof: By induction Clos(1,1,r) – you have r boxes, each box is 1 x 1 n 1 1 r r n 2 2 . . . . n r r This is a crossbar, which we know is rearrangeable.

  9. Clos Network – Proof (cont) Assume that for the case Clos(n-1, n-1, r), n>=2, the statement is true. For the case Clos(n, n, r), we use the first switch in the middle to reduce the requirement to Clos(n-1, n-1, r). n x m n n 1 1 1 . . . . . . . . . n n r n r

  10. Clos Network – Proof (cont) Permutation Output side Each box is a node with degree=n (i,j) for p(j) = i 1 p1 n n 2 p2 1 1 . . n n Bipartite graph n pn 2 2 n+1 n n . . n n 2n 1 1 (r-1)n+1 2 2 . Perfect matching 3 3 . 4 4 rxn 5 5 Each box will have n outputs Each box will have n input edges Because n inputs, n outputs, we can always find a perfect matching. If we take out a middle box, and now have (n-1) inputs, (n-1) outputs.

  11. Clos Network – Strictly non-blocking Clos Network is non-blocking in strict sense when m >= 2n-1. n x (2n–1) n n 1 1 1 n n 2 2 2 . . . . . . . . . n n r 2n-1 r Each box has 2n-1 output pins Each box has 2n-1 input pins

  12. Clos Network – Proof Proof by contradiction From i to j, we cannot make connection, e.g. from 1 to 2, we cannot make connection. Only time we can’t make a connection is if all paths are taken. Input i has taken n-1 signals, output j has taken n-1 signals. Thus, at most 2n-2 paths are taken. However, we have 2n-1 boxes for 2n-1 distinct paths between i and j. So we will always have at least one path to go through.

  13. Clos Network – Proof (cont) At most n-1 boxes taken from 1, and n-1 boxes taken from 2, so 2n-2 boxes are taken. n x (2n–1) n n 1 1 1 n-1 n n 2 2 2 . . . . . . . . . n-1 n n r 2n-1 r

  14. Clos Network – More than three stages Clos Networks: Adding wires to reduce switches. Can we do better? Add even more wires to reduce number of switches? Yes! By increasing number of stages. Change middle stage box into another 3-stage Clos Network, this gives us 5-stage Clos Network. Can repeat this process! Replace with 3-stage Clos Network n n 1 1 1 . . . . . . n n r m r

  15. Clos Network – More than three stages (cont) C(1) = N2 switches (crossbar) C(3) = 6N3/2 – 3N C(5) = 16N4/3 – 14N + 3N2/3 C(7) = 36N5/4 – 46N + 20N3/4 – 3N1/2 C(9) = 76N6/5 – 130N + 86N4/5 – 26N3/5 + 3N2/5 (if N is huge, we want more levels)

  16. Benes Network Start with Butterfly Network. What if we flip this, and repeat this network to the other side? This is Benes Network. . . . . . . . . . . . . . 2n 0 1 n-1 n 2x2n inputs: (2n+1)2nx4 switches N inputs: 2N(2log2N-1) switches

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