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Verification Methodologies in a TLM-to-RTL Design Flow

Verification Methodologies in a TLM-to-RTL Design Flow. Atsushi Kasuya. JEDA Technologies, Inc. Agenda. Introduction Cycle Accurate Temporal Assertion OCP Compliance Checker Assertion on PVT Model OCP TL2 PVT Example Assertion on PV Model PV Transaction Level Assertion Example

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Verification Methodologies in a TLM-to-RTL Design Flow

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  1. Verification Methodologies in a TLM-to-RTL Design Flow Atsushi Kasuya JEDA Technologies, Inc.

  2. Agenda • Introduction • Cycle Accurate Temporal Assertion • OCP Compliance Checker • Assertion on PVT Model • OCP TL2 PVT Example • Assertion on PV Model • PV Transaction Level Assertion Example • Assertion Reuse • Conclusion and Future Work

  3. Introduction • Native SystemC Assertion (NSCa) • Temporal Assertion Written Natively in SystemC context • Cycle Accurate Temporal Primitives (like SVA/PSL) • PVT level Assertion Primitives • PV level Assertion Primitives (under development) • Two ways to write assertion • NSC syntax ( Extended C++ syntax to handle assertion construct natively. e.g. @[1,5] = one to five cycle delay) • Assertion Macros • Temporal Expression as a regular C expression • Support assertions for models in various abstraction levels

  4. Assertion Hierarchy Master Device Slave Device PV TLA Functional Level Functional Level PVT TLA Protocol Level Protocol Level Physical Level Physical Level CLA

  5. Cycle Accurate Temporal Assertion • SVA/PSL like temporal primitives • always • imply ( |-> , |=> ) • m to n delay ( @[m:n] ) • repetitions ( [*m:n], [->m:n], [=m:n] ) • and, or, intersect, within, throughout, etc. • Native in SystemC thread context • Provides a boolean expression in C++ code if ( !nsc_sequence( req.read()==1 @[1,5] gnt.read()==1 ) ) error() ; if (!NSC_SEQUENCE( NSC_BOOL(req.read()==1) && NSC_SEQ(1,5, NSC_BOOl(gnt.read()==1)) ) ) error() ;

  6. OCP Protocol Checker • OCP 2.2 Compliance Checker Library • Written with NSCa Cycle Accurate Assertion • On-the-Fly Check as simulation runs • Based on the OCP-IP Functional Verification Working Group (FVWG) compliance check specification • Implemented all of the compliance checks (70+ checks) OCP Master OCP Slave OCP TL1 Channel OCP Monitor Config File NSCa OCP Compliance Checker

  7. PVT Level Assertion • Aimed to provide high level performance check • Event Driven Checker • Simple Temporal Primitives • Asynchronous Event Handling • Mutex Primitive • C++ Class Library ( User Extendable ) • Queue Models • Coverage Bin • Unified Verification Error Handling to support debugging in GUI

  8. PVT Assertion Example • Outstanding Request Monitor • Simply connect the specific events to a queue model Transactions Response Reque st ReqEnd ResponseStart always ReqEnd ResponseStart Mutex Simple Queue arrive depart (outstanding req counting) Coverage Bin (outstanding req cover a ge) Property

  9. PV Level Assertion • Aimed to provide high level protocol check • Callback Driven Checker • Support 0-Delay Model • New Set of PV Temporal Primitives • Construct temporal sequence without clock • Interface to Callback Events • Callback Layer is isolated from the Assertion itself • Can be connected to various if (e.g. TLM 2.0 Analysis Port) • Re-use assertions over different abstract models

  10. PV Level Assertion Primitives • Primitives works without Clock • A sequence is constructed with Callback events and TLA primitives • Property Primitives • tla_always( <sequence> ) • always check the given sequence • tla_alwaysif( <sequence1> ) tla_then( <sequence2> ) • when seqence1 occurs then check sequence2 • Sequence Primitives • tla_repeat( N, <sequence> ) • repeat sequence N times • ( <sequence1> ) tla_within ( <sequence2> ) • seqence1 must happen within sequence2 • ( <sequence1> ) tla_without ( <sequence2> ) • seqence1 must not happen within sequence2

  11. PV Level Assertion Primitives (Cnt.) • Sequence Primitives (Continued) ( M, <sequence1> ) tla_followedby ( N, <sequence2> )seqence1 must be followed by sequence2 M: number of times (-1 means endless) N: number of outstanding sequence1 before sequence2 is detected ( <sequence1> ) tla_until ( <sequence2> ) repeatedly check seqence1 until sequence2 occurs tla_cositch ( tla_case( <sequence1> ) tla_then ( <sequence2> ) .. ) tla_endConcurrent swich, when seqence1 happens, check sequence2

  12. PV Level Assertion Example • When Register A is accessed, Register B must be accessed before the next Register A access tla_always( (-1, REG_A_ACCESS() ) tla_followedby( 0, REG_B_ACCESS() ) ) tla_alwaysif( REG_A_ACCESS() ) tla_then ( ( REG_B_ACCESS() ) tla_without ( REG_A_ACCESS() ) )

  13. Assertion Reuse • Reuse Assertions for Higher Abstraction Model to Lower Level • Convert Callback to Event base (PV -> PVT) • Construct Adaptor to extract events from signals (PVT -> CA) • NSCa’s Cycle Accurate temporal sequence can be used to construct adoptor for Cycle Accurate Model PV Model PVT Model CycleAccurateModel callback event notify Adaptor Cycle AccurateAssertion PVT Assertion PV Assertion Bus ProtocolCheck Performance Check ApplicationProtocolCheck

  14. Conclusion and Future Work • NSCa provides • Temporal Assertion Mechanism for Various Abstract Levels • Native in SystemC (C++) • Some ideas for PVT and PV assertions • Future Work • More sturdy is needed to refine TLA temporal Primitives • Standarization of Callback mechanism is necessary • AOP like mechanism for adding callbacks?

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