Ptolemy II (UC Berkeley) Graphical entry of models Components are ‘actors’ Actors designed in Java

1. Automated Modeling and Emulation of Interconnect Designs for Many-Core Chip Multiprocessors Colin J. Ihrig, Rami Melhem, and Alex K. Jones University of Pittsburgh Email: cji3@pitt.edu, melhem@cs.pitt.edu, akjones@ece.pitt.edu ACME Actor Generator • Problem • Architectures moving towards many cores • Need to study new architectures • Software simulators do not scale well • System design is time consuming ACME Actor Generator Emulate caches and interconnect in FPGA fabric Leave remaining components in software • ACME • Emulate systems using FPGAs • System emulation • Rapid SoC prototyping • Hardware design • Ptolemy II (UC Berkeley) • Graphical entry of models • Components are ‘actors’ • Actors designed in Java Actor Generator GUI ACME actor library mirrors Ptolemy’s Java library Xilinx library contains IP blocks and board descriptions Extend Ptolemy II GUI for graphical actor creation Generate skeleton code for actor • Processor Based Actors • Design complex components • Example: Switch arbiters • Describe functionality in C • Use Java Native Interface with Ptolemy II SoC Generation Tool Flow Ptolemy II Graphical Model Creation Xilinx Platform Studio System Emulation Augmentation 2x2 Mesh Interconnect Network 2x2 Mesh Interconnect Network User specified latency and throughput circuit Network Switch Three cycle throughput Logic Containing VHDL Actors One additional latency cycle Microblaze Processor Systems Processors set / reset barrier Processor / hardware synchronization via a hardware barrier circuit Serial Port for PC Communication Processing Node Barrier clocks custom logic