Parul Polytechnic Institute

1. Subject Code : 3330705 Name Of Subject : Microprocessor and assembly language programming Name of Unit : Introduction to Microprossor Topic : architecture of 8085 Name of Faculty : H.M.Avaiya Name of Students: (i) PrajapatiShivangi(007) (ii) UpadhyayNidhi (019) Parul Polytechnic Institute

2. Architecture of the 8085 processor

3. Introduction • The internal architecture of the 8085 microprocessor is shown in figure. • The 8-bit data enters into the microprocessor through the multiplexed address/data bus AD7-AD0. • The 8-bit internal bus connects the accumulator, temporary register, flags, instruction register ,interrupt control unit, serial I/O unit, general purpose register, stack pointer, program counter and data/address buffer. • The ALU is fed from the accumulator and temporary register.

5. Register: • The 8085 contains both 8-bit and 16-bit register which are discuss below: • (1)Accumulator(ACC): • It is an 8-bit register and focus of all the arithmetic, logic, load and store and I/O instructions. • (2)General purpose register: • There are six 8-bit general purpose registers B,C,D,E,H And L. • They can also be used as 16-bit register pairs as BC, DE,HL. • The HL pair is used for storing 16-bit memory address, while BC and DE are normally used to store data except in few instruction.

6. (3)Program counter(PC): • Te program counter is a 16-bit register which stores address of the next instruction to be executed. • It is responsible for sequencing the program execution. • (4)stack pointer(SP): • It is a 16-bit register which stores the address of top of stack. • Stack is a LIFO RAM to store data temporarily during the execution of the program.

7. (5)FLAG register: • it is an 8-bit register which contains five 1-bit flags used by conditional jump and call instructions. • It is shown in figure. • The flags are set or reset or according to the result of execution of last arithmetic or logical instruction . • The flag register is also known as PSW (program status word) or F-register. • There are five flags as follows: • The carry flag(CY): is an overflow from the 8-bit addition. • It acts as a “borrow “ flag during subtract.

8. PARITY FLAG CARRY FLAG SING FLAG S Z - AC - P - CY AUXILIARY CARRY FLAG ZERO FLAG

9. The parity flag(P): indicates no. of 1’s in the result of arithmetic or logical instruction which is always stored in accumulator. If no. of 1’s are even in the accumulator, then it is called even parity and parity flag is set to 1. on the other hand if no . of 1’s in the accumulator are odd. Then it is called odd parity and parity flag is reset to 0. • The auxiliary carry flag(AC): indicates an overflow from the bit-3 of the result as like CY which is overflow from bit-7. the auxiliary carry flag is generally used in BCD operation. • The zero flag(Z): is set to 1 when result of arithmetic or logical instruction is zero . it is cleared when result is not zero.

10. The MSB of the accumulator after the arithmetic or logical operation is copied into the sing (s)flag. • The 1 in the sign flag indicates result is negative and 0 in the sign flag .indicates result is positive. • Arithmetic and logic unit: • It is a logic circuit which is responsible for performing all the arithmetic and logical operations. The ALU receives the inputs from the accumulator . The ALU also accesses the flag register in order to set or reset the individual flags according to the result it has computet.

11. Instruction register and decoder: • During the op code fetch cycle , the 8-bit opcode of an instruction is transferred into the instruction register . The contents of the instruction register is received by instruction decoder and it is decoded to find the meaning of the instruction. • After decoding the instruction, decoder directs the timing and control section to perform sequence of events in order to complete the execution of the current instruction.

12. Thank you………..