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Recitation #9, Section F, 15-213, Sp 06

Virtual memory Reminders: Quiz today: virtual memory Shell Lab due Thursday. TA: Jernej Barbic Modified from: Kun Gao’s and Minglong Shao’s recitations, Spring 2005, Fall 2004. Recitation #9, Section F, 15-213, Sp 06. Virtual memory. One of the most important concepts in CS

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Recitation #9, Section F, 15-213, Sp 06

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  1. Virtual memory Reminders: Quiz today: virtual memory Shell Lab due Thursday TA: Jernej Barbic Modified from: Kun Gao’s and Minglong Shao’s recitations, Spring 2005,Fall 2004 Recitation #9, Section F, 15-213, Sp 06

  2. Virtual memory • One of the most important concepts in CS • Benefits of virtual memory (VM): • Use RAM as a cache for disk • Easier memory management • Simplifies linking and loading • Access protection • Share memory efficiently

  3. 0: 1: CPU N-1: Virtual memory Memory • Page hit: page is in memory • Page fault: page is on disk Per Process: Page Table Virtual Addresses Physical Addresses 0: 1: P-1: Disk

  4. Virtual and physical addresses p p–1 0 n–1 virtual address virtual page number (VPN) page offset address translation m–1 p p–1 0 physical page number (PPN) page offset physical address Virtual Memory: up to 2n -1 bytes Physical Memory: up to 2m -1 bytes

  5. Page Table translates VPN to PPN • Separate page table per each process • VPN is the index into the page table

  6. Translation Lookaside Buffer (TLB) • Page table is in memory or even on disk(slow access) • TLB keeps things manageable 1. VA 4. PA CPU MMU/ Translation Cache/Memory 2. VPN 3. PTE TLB 5. Data

  7. TLB and the L1-Cache n–1 p p–1 0 virtual address virtual page number page offset valid tag physical page number TLB . . . = TLB hit physical address tag byte offset index valid tag data L1-Cache = data cache hit

  8. Worst case? (most delay)? • TLB miss, page fault on page table, then page fault on memory read 3. PTEA (PTBR + VPN) 1. VA Cache/Memory CPU MMU/ Translation 5. PA 4. PTE 2. VPN TLB Page Fault/ Page Table Page Fault/ Mem Read 6. Data DISK

  9. Example • 20-bit virtual addresses • 18-bit physical addresses • Page size is 1024 bytes • TLB is 2-way associative with 16 total entries

  10. 0 16 14 13 12 11 10 9 2 1 6 5 4 3 17 18 7 8 2 15 10 0 1 16 15 14 17 12 19 13 9 8 7 6 5 4 3 11 Part 1 • A. Virtual address • B. Physical address TLBT TLBI VPN VPO PPN PPO

  11. Example: TLB and page table

  12. Part 2 Virtual address 0x78E6 • A. 078E6 = • B. Address translation • C. Physical address 0000 0111 1000 1110 0110 01 0101 1100 1110 0110

  13. Part 2 Virtual address 0x04AA4 • A. 04AA4 = 0000 0100 1010 1010 0100 • B. Address translation • C. Physical address 01 1010 0010 1010 0100

  14. Further material • Section 10.6.4: a concrete example • Read carefully and solve practice problem 10.4

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