Twin Binary Sequences: A Non-Redundant Representation for General Non-Slicing Floorplan

1. Twin Binary Sequences:A Non-Redundant Representation for General Non-Slicing Floorplan Evan Young Department of Computer Science and Engineering The Chinese Univ. of Hong Kong Chris Chu Zion Shen Department of Electrical and Computer Engineering Iowa State University

2. Types of Floorplanning Structures • Slicing Floorplan • Mosaic Floorplan • General Floorplan Slicing Mosaic General Empty Room

3. Mosaic Floorplan • Introduced by Hong et al. [ICCAD-00] • Mosaic Floorplan Representations: • Corner Block List (CBL): Hong et al. [ICCAD-00] • Q-Sequence: Sakanushi & Kajitani [APCCAS-00] • Advantages: • Much smaller solution space compared with general floorplan • Linear time floorplan realization • Disadvantage: • Some floorplans are excluded, e.g.,

4. Extending Mosaic to General • Dissect into more than m (>= n) rooms • Include m-n empty rooms However • Don’t know where to assign the empty rooms • Assigning randomly results in redundant rooms • A large # of empty rooms needed to be inserted • In [ISPD-01], CBL is extended to cover the optimal floorplan by inserting n2–n empty rooms • Size of solution space is

5. Our Contributions • Twin Binary Sequences (TBS) • a new representation for mosaic floorplan • We know exactly where to insert irreducible empty rooms for any given TBS • Every general floorplan can be obtained this way • Every general floorplan can be obtained from a unique TBS • Tight bound on the maximum # of empty rooms in a mosaic floorplan • A linear time floorplan realization algorithm

6. Twin Binary Trees (TBT) 0 0 1 1 0 1 0 1 0 1 0 1 Labeling=100101 Labeling=011010

7. B D T1 T2 A A E F A B 1 C F C E C E D 0 0 D 1 1 0 F B 0 1 0 1 TBT as Mosaic FP Representation • First suggested by Yao et al. [ISPD-01] to be used as a mosaic floorplan representation • However, • not easy to maintain the twin binary property when we perturb the two trees • more complicated to be implemented in computer

8. B D T1 T2 A A E F A B 1 C F C E C E D 0 0 D 1 1 0 F B 0 1 0 1 Inorder Traversal and Labeling Observation: Mosaic FP  A pair of binary trees with with same inorder traversals and complementary labelings Inorder traversal: ABCDEF ABCDEF Labeling: 01101 10010

9. D A T1 T1 A F F D C E 1 0 1 C E B 0 1 1 0 1 B A B A B 0 1 C E C E D D F F Maintaining Twin Binary Property • However, it is not sufficient to represent a mosaic floorplan uniquely by: • inorder traversal of modules • labeling of T1 (= complemented labeling of T2) ABCDEF ABCDEF ABCDEF 01101 01101 10010 B T2 A E 1 C F D 0 0 0 1

10. 0 D 0 1 A F 1 0 C E 0 1 1 0 B 0 1 Directional Bits • Given an inorder traversal and a labeling, a binary tree can be uniquely specified by adding directional bits Inorder traversal (p): ABCDEF Labeling (a): 01101 Directional bits (b): 001001 Conditions on valid b: Let a=a1a2...an-1, b= b1b2...bn. For the bit sequence b1a1b2...an-1bn, (1) # of 0’s = # of 1’s + 1 (2) # of 0’s >= # of 1’s for any prefix

11. Twin Binary Sequences (TBS) • Definition: A twin binary sequence is a 4-tuple (p, a, b, b’) s.t. p = inorder traversal of T1 and T2 a = labeling(T1) = labelingC(T2) b = directional bits of T1 b’ = directional bits of T2 • Given a TBS, the mosaic floorplan can be constructed in O(n) time by a simple and efficient floorplan realization algorithm Theorem: There is a one-to-one mapping between twin binary sequences and mosaic floorplans.

12. Size of Solution Space • One-to-one mapping between TBS and mosaic floorplan • So # of different TBS is given by Baxter number (Yao et al. [ISPD-01]) • Asymtotically, O(n! 23n / n1.5) p n! permutations of module names a b b’ # of binary trees = Q(22n / n1.5) O(2n) combinations

13. Irreducible Empty Room • An irreducible empty room is an empty room that cannot be removed by merging with another room in the floorplan. • Irreducible empty room (X) must occur in reducible empty room irreducible empty room A D • wheel structure • A,B,C & D are not X A D X X or C B B C

14. Mapping Between Mosaic & General FP • Mapping Mx: X X D D A A A D A D X X C C B B C B B C Theorem: Every general floorplan can be mapped by Mx from one and only one mosaic floorplan.

15. Change in TBT when Inserting X • Only two ways to insert X into a tree: D D A A A D A D X X C C B B C B B C C A C A A C A C D B X X D B X X D B D B T1 T2 T1 T2 T1 T2 T1 T2 A A A A B X B X B B

16. T1’ T2’ D B X X X X A E A C T1 T2 X X X D B C F F A E A C X X C F F B E B E X D D Insertion and Matching of X in TBT A B C D E F Inorder traversal + Labeling T1’: X0A0X0B1C1X1D0E0F1X1X T2’: X0A1B0C0X0X0D1E1F1X1X

17. A B A B C C X F X E F D E D Different Ways of Matching X Inorder traversal + Labeling T1”: A0B1C1X1D0E0F T2”: A1B0C0X0D1E1F T1” T2” T1” T2” D B D B Match 1st X Match 2nd X A E A C A E A C X F F X F F C X C E B E B X D D

18. X Insertion Algorithm • An efficient algorithm designed: • Without constructing any tree. Insert X to TBS directly. • Linear time • Every general floorplan can be generated uniquely from one mosaic floorplan and one way of matching X

19. Bounds on # of X Inserted • Upper bound: • Lower bound: X X X X X X X X X X X X X X X X

20. Experimental Setup • PC with 1400 MHz Intel Xeon Processor and 256 Mb memory • Simulated annealing to perturb TBS • Best result out of 10 runs is reported

21. Experimental Results • Area minimization

22. Experimental Results • Area and wirelength minimization

23. Thank You

24. Floorplan Representations • Slicing • Normalized Polish Expression: Wong & Liu [DAC-86] • Mosaic • Corner Block List (CBL): Hong et al. [ICCAD-00] • Q-Sequence: Sakanushi & Kajitani [APCCAS-00] • General • Polar graphs: Ohtsuki et al. [ICCST-70] • Sequence pair: Murata et al. [ ICCAD-95] • Bounded Slicing Grid (BSG): Nakatake [ICCAD-96] • Transitive Closure Graph (TCG): Lin & Chang [DAC-01]