Nick McKeown

1. Spring 2012 Lecture 4 Parallelizing an OQ Switch EE384x Packet Switch Architectures Nick McKeown

2. many outputs one output 1 1 1 1 1 k k N N Scaling an OQ Switch Work conserving if memory b/w >= R(N+1) Not so clear.

3. B5 C5 B5 A5 B6 A5 B6 B6 C6 A6 B5 Time slot = 2 Time slot = 3 Time slot = 1 A6 B A8 A8 A7 A8 A7 Parallel OQ SwitchMay not be work-conserving Constant size packets 1 A 1 2 k=3 C N=3 At most two memory operations per time slot: 1 write and 1 read

4. Work Conserving Problem How can we design a parallel OQ work-conserving switch from slower parallel memories? • Theorem (sufficiency) • A parallel output-queued switch is work-conserving with 3N –1 memories, each able to perform at most one memory operation per time slot.

5. Re-stating the Problem • There are K cages which can contain an infinite number of pigeons. • Assume that time is slotted, and in any one time slot • At most N pigeons can arrive and at most N can depart. • At most 1 pigeon can enter or leave a cage via a pigeon hole. • The time slot at which arriving pigeons will depart is known • For any switchWhat is the minimum K, such that all N pigeons can be immediately placed in a cage when they arrive, and can depart at the right time?

6. DT=t DT=t+X Only one packet can enter or leave a memory at time t Only one packet can enter or leave a memory at any time DT=t+X Intuition for Theorem Time = t Only one packet can enter a memory at time t Memory

7. Proof of Theorem When a packet arrives in a time slot it must choose a memory not chosen by • The N – 1 other packets that arrive at that timeslot. • The N other packets that depart at that timeslot. • The N - 1 other packets that can depart at the same time as this packet departs (in future). Proof By the pigeon-hole principle, the switch can be work-conserving if there are 3N –1 memories, each able to perform at most one memory operation per time slot.

8. Memory Memory Memory Memory Memory Memory Memory Memory A5 1 A4 A3 A4 A1 A1 A5 B1 C3 C3 C1 B3 B1 K=8 C1 A Parallel Shared Memory Switch At most one operation – a write or a read per time slot A R B R C Arriving Packets Departing Packets • From theorem 1, k = 7 memories don’t suffice .. but 8 memories do

9. Distributed Shared Memory Switch Switch Fabric Memories Memories Memories R R R Line Card 1 Line Card 2 Line Card N The central memories are distributed to the line cards and shared. Memory and line cards can be added incrementally. From theorem 1, the switch is work-conserving if we have a total of 3N –1 memories, each able to perform one operation per time slot i.e. a total memory bandwidth of  3NR.

10. Switch bandwidth What switch bandwidth does the DSM switch need in order to be work-conserving? Theorem (sufficiency)A switch bandwidth of 4NR is sufficient for a distributed shared memory switch to be work-conserving. Proof There are a maximum of 3 memory accesses and 1 external line access per time slot.

11. Switch Algorithm What switching algorithm allows the DSM switch to be work-conserving? • Shared bus: No algorithm needed. • Crossbar switch: Algorithm needed because only permutations are allowed. Theorem An edge coloring algorithm can switch packets for a work-conserving distributed shared memory switch ProofKönig’s theorem: Any bipartite graph with maximum degree  has an edge coloring with  colors.

12. Summary - Switches with 100% throughput Switch Algorithm Total MemBW Switch BW Fabric # Mem. Mem. BW OQ Bus N (N+1)R N(N+1)R NR None Shared Mem. Bus 1 2NR 2NR 2NR None MWM IQ Crossbar N 2R 2NR NR 2N 3R 6NR 2NR Maximal CIOQ Cisco GSR Crossbar Time Reserve* 2N 3R 6NR 3NR PSM Bus k 3NR/k 3NR 3NR C. Sets DSM Juniper M-series N 3R 3NR 4NR Edge Color Xbar N 3R 3NR 6NR C. Sets N 4R 4NR 4NR C. Sets PPS - OQ Clos Nk 2R(N+1)/k 2N(N+1)R 4NR C. Sets Nk 4NR/k 4NR 4NR C. Sets PPS Clos None Nk 2NR/k 2NR 2NR