180 likes | 194 Vues
Explore the co-existence of design rules and process models in addressing pattern-process interactions, and their impact on design and manufacturing variability.
E N D
Is Co-existence Possible? David White
ECD/CMP Virtual Mfg Process Library Calibrate Model Geometry Extraction Geometry Extraction ProductDesign LayoutFile Test Wafer Design Layout File ECD/CMP Virtual Mfg Process Library Virtual Manufacturing Use Model Prediction Step Calibration Step Data from ECD & CMP Processing Results Fabricate Test Wafer (ECP/CMP) Measurement Data From Test Wafer Predict New Design Full-Chip Prediction Semi-Physical Model Tailored to Specific Process Tailored to Customer’s Process & Design Topographical Analysis
Memory Analog IP Blocks Rotated IP Block CPU Block What Are Pattern-Process Interactions Structures with Same Line widths, Same Local Density, and Same Polish Conditions Have Very Different Cu Loss High Thickness Low IITC 2005, Nagaraj NS: “Copper and Low k Scaling Challenges: A Design Perspective”
Accounting For Variation in Design Process Actual Thickness +20% Systematic & Random Thickness Manufacturing Variation Guardband Systematic Thickness Manufacturing Variation Guardband -20% Current “2D” Methodology is Conservative Full Chip Guardband for Both Systematic and Random Thickness Variation (+- 20%) Random Thickness Manufacturing Variation Guardband +10% Actual Thickness -10% Cadence “3D” Methodology Eliminates Systematic Guardband Leaving Only a Relatively Small Random Thickness Variation (+- 10%)
Experimental Results: CMP Aware Routing CMP variation • On average 7.5% reduction • Up to 10.1% reduction Timing • On average 7% reduction • Up to 10% reduction [Cho et al, ICCAD’06]
Rules versus Models as Function of Pattern-Process Dependent Interaction Non-linear, multi-dimensional process or system MORE (Volumes) HIGH Complexity Complexity Value of Models Value of Rules LESS LOW Process Interaction GLOBAL LOCAL
Deficiencies with Pure Rules Based Approach Little Value Back to Manufacturing Characterization of Pattern-Process Behavior Results in Loss of Accuracy Manufacturing Customer Capturing all meaningful interactions into rules Violations & Scoring Metrics Design Tools Design Rules Pattern Geometries Local versus global interactions Design Customer
Deficiencies with Pure Model Based Approach Significant Value Back to Manufacturing Characterization of Pattern-Process Behavior Manufacturing Customer No Filtering of Data Volumes of Data (width and thickness dimensions) Speed? Design Tools Process Models Pattern Geometries e.g. 25M thickness values What to do with Data? How does it impact my design? Why does speed have question mark? To be addressed later Results in Speed and Data Issues Design Customer
Rules and Models Not Mutually Exclusive Significant Value Back to Manufacturing Characterization of Pattern-Process Behavior Manufacturing Customer Volumes of Data (width and thickness dimensions) Process Models Global Pattern Geometries Accuracy Violations & Scoring Metrics Local Pattern Geometries Design Tools Design Rules Speed Design Customer
65nm Rule Deck Example • Ran three separate 65nm rule decks on 65nm production design • 96% of operation counts are done with 0 halo size • Density rules using 100 micron window size are less than 1% of overall operations but 5% of overall execution time Halo Size
Models Complement Rules Design Rules Say OK, Models Say Its Not Acceptable Metal 4 Copper Density Metal 4 Copper Loss • Both Areas Have 70% Average Density • But Very Different Copper Loss 0.70 1200A 0.70 2500A 1200A 2500A
Process for Forming Interconnect (Wires) Features Defined Through Lithography and Etch dielectric copper ECD Copper Plating Step 1: Copper Plating dielectric Copper CMP (Bulk) Step 2: Bulk Polish Copper CMP (Touchdown) Step 3: Copper Clear or Touchdown Copper CMP (Barrier) Step 4: Barrier Removal
Rules versus Models as Function of Uncertainty in Process Characterization Non-linear, multi-dimensional process or system MORE (Volumes) HIGH Value of Models Value of Rules LESS LOW POORLY CHARACTERIZED UNSTABLE PROCESS WELL CHARACTERIZED STABLE PROCESS Process Maturity
Chemical Mechanical Polishing Force Modern polishing heads have separate rings where the force can be radially adjusted Table with Pad Rotating Within-Chip Variation: dominated by layout, pad and slurry interaction Within-Wafer Variation: dominated by pressure zone apportionment in carrier and relative velocities of carrier and table
Interconnect Variation Wafer Level Variation WaferSurface • Within-Chip Variation is Huge! • Thickness Variation: 10% to 30% • Width Variation: 10% to 30% • Due to Design Impact on Manufacturing • Varying Feature Density • Varying Feature Widths • Variation Leads to Over-Compensation in Design • Timing Failures • Decreased Performance • Increased Power Consumption ChipSurface Within-Chip Variation Oxide Loss Dishing Total Copper Loss Erosion IsolatedThin-Lines IsolatedWide-Lines Dense ArrayThin-Lines Dense ArrayWide-Lines