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Microprocessor System Design Programmable Interrupt Controller

Microprocessor System Design Programmable Interrupt Controller. Omid Fatemi (omid@fatemi.net). Outline. Interrupts in PC Interrupts and calls 8259 – PIC Programming 8259 Interfacing 8259 in PC. What is Interrupt. 8086/88 Interrupts. 256 Interrupts. Types 00 ……. FF.

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Microprocessor System Design Programmable Interrupt Controller

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  1. Microprocessor System DesignProgrammable Interrupt Controller Omid Fatemi (omid@fatemi.net)

  2. Outline • Interrupts in PC • Interrupts and calls • 8259 – PIC • Programming 8259 • Interfacing 8259 in PC

  3. What is Interrupt

  4. 8086/88 Interrupts • 256 Interrupts. • Types 00 ……. FF. • Type is provided in a specified timing.

  5. Interrupt Vector Table

  6. Answering an Interrupt • Save status • FR, IP, CS • Service the interrupt • Interrupt service routing (ISR) or Interrupt handler • Based on Interrupt vector number • From Interrupt vector table • Four bytes for every interrupt: CS:IP • Return to original position by IRET

  7. Difference with Call • CALL FAR can jump to any location (1M range) • Hardware interrupts can come at any time. • Interrupts are maskable. • After CALL only CS:IP is saved • End of routine: RETF vs. IRET.

  8. Interrupt Categories • Hardware interrupts: • Only 3 pin, but how 256 interrupt? • INTR (in), NMI (in), and INTA (out) • INTR can be masked by CLI / STI • Active high. • 80x86 finished instruction. • Push FR, CS, IP • NMI: INT 02. • Software interrupts • INT nn • Example: INT 21H (DOS functions)

  9. Interrupt and Flags

  10. Predefined Interrupts • INT 00 (divide error) • INT 01 (single step) • Set Trap flag (how?) • PUSHF, POP AX, … • Trace in debug • INT 02 (NMI) • INT 03 (breakpoint) • INT 04 (signed number overflow) • INT) instruction • Examine Interrupt vector table. • Examine INT 12H (size of conventional RAM in AX)

  11. 8259

  12. Control Word (initialization)

  13. ICW1, ICW2

  14. ICW3, ICW4

  15. Example

  16. Masking and Prioritization • OCW (operation command word)

  17. Programming OCWs

  18. OCW3

  19. 8259 in PC XT ICW1: 13H ICW2: 08H ICW3: 09H

  20. Interrupt Sources in PC

  21. Sources of NMI

  22. 8259s in AT

  23. IRQ9 Instead of IRQ2

  24. Interrupts (Summary)

  25. Edge Triggered and Interrupt Sharing • Level triggered mode: IRQ line should be brought down before EOI. • Edge triggered mode: noise on IRQ lines might cause false interrupts. • New computer and busses. • Level triggered. • Interrupt sharing.

  26. Problems and HW7 • hDue Saturday 24 Khordad (in class) • 30, 31, 40, 53, 61 • Page 226 • Other problems: • 1, 2, 18, 21, 22 • 30, 31, 40, 41 • 53, 61, 68, 75 • Section 6.5: examples 7, 8, 9

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