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Intel 8088 (8086) Microprocessor Structure. Overview. Textbook: . J. L. Antonakos, "An Introduction to the Intel Family of Microprocessors," Third Edition, Prentice Hall, 1999. Objectives:. The course will provide knowledge to build and program microprocessor-based systems.
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Intel 8088 (8086) Microprocessor Structure Microprocessor System Design
Overview • Textbook: J. L. Antonakos, "An Introduction to the Intel Family of Microprocessors," Third Edition, Prentice Hall, 1999 • Objectives: The course will provide knowledge to build and program microprocessor-based systems. • Microprocessor architecture • Architecture of microprocessor-based systems • Programming microprocessor-based systems • Future trends • Grading: Two midterms, one final exam, and homeworks Microprocessor System Design
Microprocessor Bus Control unit Datapath ALU Memory Output units Input units Reg. What are microprocessor-based systems? • Microprocessor-based systems are electrical systems consisting of microprocessors, memories, I/O units, and other peripherals. • Microprocessors are the brains of the systems • Microprocessors access memories and other units through buses • The operations of microprocessors are controlled by instructions stored in memories Microprocessor System Design
Address bus MAR PC IR Control unit Control bus X Y ACC ALU Data bus What are microprocessors? • A microprocessor is a processor (or Central Processing Unit, CPU) fabricated on a single integrated circuit. A simple microprocessor architecture Microprocessor System Design
Evolution of Computers • First generation (1939-1954) - vacuum tube • Second generation (1954-1959) - transistor • Third generation (1959-1971) - IC • Fourth generation (1971-present) - microprocessor Microprocessor System Design
Evolution of Computers • First generation (1939-1954) - vacuum tube IBM 650, 1954 Http://history.acusd.edu/gen/recording/computer1.html http://www.cs.virginia.edu/brochure/museum.html http://www.columbia.edu/acis/history/650.html Microprocessor System Design
Evolution of Computers • Second generation (1954-1959) - transistor Manchester University Experimental Transistor Computer Http://history.acusd.edu/gen/recording/computer1.html http://www.computer50.org/kgill/transistor/trans.html Microprocessor System Design
Evolution of Computers • Third generation (1959-1971) - IC PDP-8, Digital Equipment Corporation • Thanks to the use of ICs, the DEC PDP-8 is the least expensive general purpose small computer in 1960s Http://history.acusd.edu/gen/recording/computer1.html http://www.piercefuller.com/collect/pdp8.html Microprocessor System Design
ROM/RAM buffer Timing Reset Control logic Program counter Instruction decoder ALU Reg. I/O Refresh logic System bus Evolution of Computers • Fourth generation (1971-present) - microprocessor • In 1971, Intel developed 4-bit 4004 chip for calculator applications. http://www.intel.com Block diagram of Intel 4004 4004 chip layout A good review article: The History of The Microprocessor, Bell Labs Technical Journal, Autumn, 1997 Microprocessor System Design
P III Pentium P 4 P II 80386 80486 8088 80286 8080 8080 P 4 P III P 4 Pentium P II P II Pentium P III 8088 80386 80386 80486 80386 8088 80486 8088 Pentium 8080 8080 80286 80286 P II P III 80286 P 4 80486 Evolution of Intel Microprocessors Minimum transistor sizes (µm) Number of transistors Clock frequencies (MHz) MIPS Microprocessor System Design
Other Commercial Microprocessors • PowerPC (IBM, Motorola) • Athlon, Dulon, Hammer (AMD) • Crusoe (Transmeta) • SPARC, UltraSPARC (Sun Microsystems) • TI’s TMS DSP chips (Texas Instruments) • StarCore (Motorola, Agere) • ARM cores (Advanced RISC Machines) • MIPS cores (MIPS Technologies) • Microprocessor System Design
... Keyboard Monitor Disk Other peripherals ... Bus Micro- processor Timing & control Interrupt control Memory Applications of Microprocessor-Based Systems • Computers • System performance is normally the most important design concern Block diagram of a computer Microprocessor System Design
Timing CPU Memory System bus (data, address & control signals) Serial I/O Parallel I/O Interrupt circuitry • ROM (Read Only Memory) • (start-up program) • RAM (Random Access Memory) • DRAM (Dynamic RAM) - high capacity, refresh needed • SRAM (Static RAM) - low power, fast, easy to interface 1.3 System block diagram • Crystal oscillator • Timing circuitry • (counters dividing to lower frequencies) P + associated logic circuitry: • Bus controller • Bus drivers • Coprocessor Many wires, fast. Simple (only two wires + ground) but slow. At external unexpected events, P has to interrupt the main program execution, service the interrupt request (obviously a short subroutine) and retake the main program from the point where it was interrupt. • Printer (high resolution) • External memory • Floppy Disk • Hard Disk • Compact Disk • Other high speed devices • Printer (low resolution) • Modem • Operator’s console • Mainframe • Personal computer
System bus (data, address & control signals) Speaker The Personal Computer Processor (8086 trough Pentium Coprocessor (8087 trough 80387 Timer logic (8253) System ROM 640KB DRAM Keyboard logic (8253) DMA Controller (8237) Expansion logic Interrupt logic (8259) Video card Disk controller Serial port Keyboard ... Extension slots
RAM ROM OSC. CPU I/O port Timer USART Interrupt A/D, D/A Applications of Microprocessor-Based Systems • Microcontrollers • A microcontroller is a simple computer implemented in a single VLSI chip. • In general, microcontrollers are cheap and have low performance • Microcontrollers are widely used in industrial control, automobile and home applications Block diagram of a microcontroller Microprocessor System Design
Applications of Microprocessor-Based Systems • ASICs http://www.ti.com • Microprocessors are embedded into ASIC chips to implement complex functions • In general, it requires that the microprocessors have low power consumption and take small silicon area A TI baseband chip for cellular phone applications Microprocessor System Design
Class Objectives • Hardware architecture of microprocessor-based systems • Microprocessor architecture • Memory organization • I/O units of microprocessor-based systems • How to put them together • Programming of microprocessor-based systems • Intel 80x86 instruction set • Microprocessor Interrupt services • Assembly language programming Microprocessor System Design
Overview & Review Microprocessor System Design
VDD (5V) 20-bit address 8-bit data control signals To 8088 8088 control signals from 8088 Word: 5A2F CLK High byte of word 18001 5A GND Low byte of word 18000 2F Memory locations Overview • Intel 8088 facts • 20 bit address bus allow accessing 1 M memory locations • 16-bit internal data bus and 8-bit external data bus. Thus, it need two read (or write) operations to read (or write) a 16-bit datum • Byte addressable and byte-swapping 8088 signal classification Microprocessor System Design
Address bus (20 bits) AH AL General purpose register BH BL CH CL Execution Unit (EU) DH DL Data bus (16 bits) SP CS Segment register BP DS SI SS DI ALU Data bus (16 bits) ES IP Bus control ALU Instruction Queue External bus EU control Flag register Bus Interface Unit (BIU) Organization of 8088 Microprocessor System Design
15 8 7 0 AX AH AL Accumulator BX BH BL Base Data Group CX Counter CH CL DX DH DL Data SP Stack Pointer Base Pointer BP Pointer and Index Group SI Source Index DI Destination Index General Purpose Registers Microprocessor System Design
A B n bits n bits Carry Y= 0 ? F A > B ? Y Arithmetic Logic Unit (ALU) F Y 0 0 0 A + B 0 0 1 A - B 0 1 0 A - 1 0 1 1 A and B 1 0 0 A or B 1 0 1 not A • Signal F control which function will be conducted by ALU. • Signal F is generated according to the current instruction. • Basic arithmetic operations: addition, subtraction, • Basic logic operations: and, or, xor, shifting, Microprocessor System Design
15 0 OF DF IF TF SF ZF AF PF CF Flag Register • Flag register contains information reflecting the current status of a microprocessor. It also contains information which controls the operation of the microprocessor. • Status Flags • Control Flags CF: Carry flag PF: Parity flag AF: Auxiliary carry flag ZF: Zero flag SF: Sign flag OF: Overflow flag IF: Interrupt enable flag DF: Direction flag TF: Trap flag Microprocessor System Design
Instruction Machine Codes • Instruction machine codes are binary numbers • For Example: 1 0 0 0 1 0 0 0 1 1 0 0 0 0 1 1 MOV AL, BL Register mode MOV • Machine code structure Opcode Mode Operand1 Operand2 • Some instructions do not have operands, or have only one operand • Opcode tells what operation is to be performed.(EU control logic generates ALU control signals according to Opcode) • Mode indicates the type of a instruction: Register type, or Memory type • Operands tell what data should be used in the operation. Operands can be addresses telling where to get data (or where to store results) Microprocessor System Design
AH AL General purpose register BH BL CH CL DH DL SP BP SI ALU Data bus (16 bits) DI ALU EU control instruction 1011000101001010 Flag register EU Operation 1. Fetch an instruction from instruction queue 2. According to the instruction, EU control logic generates control signals. (This process is also referred to as instruction decoding) 3. Depending on the control signal, EU performs one of the following operations: • An arithmetic operation • A logic operation • Storing a datum into a register • Moving a datum from a register • Changing flag register Microprocessor System Design
Generating Memory Addresses • How can a 16-bit microprocessor generate 20-bit memory addresses? Left shift 4 bits FFFFF 16-bit register 0000 Addr1 + 0FFFF Segment (64K) + 16-bit register Offset Offset Addr1 20-bit memory address Segment address 00000 1M memory space Intel 80x86 memory address generation Microprocessor System Design
15 0 CS Code Segment DS Data Segment Stack Segment SS ES Extra Segment Memory Segmentation • A segment is a 64KB block of memory starting from any 16-byte boundary • For example: 00000, 00010, 00020, 20000, 8CE90, and E0840 are all valid segment addresses • The requirement of starting from 16-byte boundary is due to the 4-bit left shifting • Segment registers in BIU Microprocessor System Design
0000 Segment address + Offset Memory address 3 4 8 A 0 5 0 0 0 0 CS SS 4 2 1 4 F F E 0 IP + SP + Instruction address 3 8 A B 4 Stack address 5 F F E 0 1 2 3 4 0 DS 0 0 2 2 DI + Data address 1 2 3 6 2 Memory Address Calculation • Segment addresses must be stored in segment registers • Offset is derivedfrom the combination of pointer registers, the Instruction Pointer (IP), and immediate values • Examples Microprocessor System Design
8088 Memory CS 1 2 3 4 IP 0 0 1 2 12352 MOV AL, 0 1 2 3 5 2 Fetching Instructions • Where to fetch the next instruction? • Update IP • After an instruction is fetched, Register IP is updated as follows: IP = IP + Length of the fetched instruction • For Example: the length of MOV AL, 0 is 2 bytes. After fetching this instruction, the IP is updated to 0014 Microprocessor System Design
1 2 3 4 0 (assume DS=1234H) DS 0 3 0 0 Memory address 1 2 6 4 0 (assume DS=1234H) 1 2 3 4 0 DS 0 3 1 0 (assume SI=0310H) Memory address 1 2 6 5 0 Accessing Data Memory • There is a number of methods to generate the memory address when accessing data memory. These methods are referred to as Addressing Modes • Examples: • Direct addressing: MOV AL, [0300H] • Register indirect addressing: MOV AL, [SI] Microprocessor System Design
Interrupt pointer table Reserved Memory Locations • Some memory locations are reserved for special purposes. Programs should not be loaded in these areas FFFFF • Locations fromFFFF0H to FFFFFH are used for system reset code Reset instruction area FFFF0 • Locations from00000H to 003FFH are used for the interrupt pointer table • It has 256 table entries • Each table entry is 4 bytes 003FF 256 4 = 1024 = memory addressing space From 00000H to 003FFH 00000 Microprocessor System Design
Interrupts • An interrupt is an event that occurs while the processor is executing a program • The interrupt temporarily suspends execution of the program and switch the processor to executing a special routine (interrupt service routine) • When the execution of interrupt service routine is complete, the processor resumes the execution of the original program • Interrupt classification • 8088 can have 256 interrupts Microprocessor System Design
Minimum Mode Maximum Mode • 8088 generates control signals for memory and I/O operations • It needs 8288 bus controller to generate control signals for memory and I/O operations • Some functions are not available in minimum mode • It allows the use of 8087 coprocessor; it also provides other functions • Compatible with 8085-based systems Minimum and Maximum Operation modes • Intel 8088 (8086) has two operation modes: Microprocessor System Design