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The concept of "Beyond CMOS" is being refined to facilitate technology transfer to PIDS/FEP with a newly defined logic table categorizing devices into three groups: 1) Extend CMOS, 2) Charge-based Beyond CMOS, and 3) Non-charge-based Beyond CMOS. We are examining innovative solutions in carbon-based nanoelectronics and assessing next-generation memory devices such as STTRAM and nano-wire PCM RAM, optimized for sub-15nm architectures. Ongoing efforts in architectural benchmarking and a critical review process, including a color-coded definition system, will support the advancement of these novel technologies. ###
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Definition of “Beyond CMOS” is being refined Process for Technology Transfer to PIDS/FEP made explicit Logic Devices New Logic Table structure defined to identify three device categories (1 – Extend CMOS; 2 – Charge-based Beyond CMOS; 3 – Non-charge-based Beyond CMOS) New potential solution table for “Carbon-based Nanoelectronics” Memory Devices An assessment of new memory devices is proposed STTRAM and Nano-wire PCM Ram scaled beyond 15nm Architecture New Architectural work for benchmarking “Beyond CMOS” devices is underway New Memory Architecture section will be included Critical Review New process for conducting the Critical Review being considered Definition of colors (white, green, yellow, red) under review ERD – Key Messages
