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Organized by DSP Lab, Dept. of E & ECE, IIT, Kharagpur Sponsored by Texas Instruments (India), Bangalore PowerPoint Presentation
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Organized by DSP Lab, Dept. of E & ECE, IIT, Kharagpur Sponsored by Texas Instruments (India), Bangalore

Organized by DSP Lab, Dept. of E & ECE, IIT, Kharagpur Sponsored by Texas Instruments (India), Bangalore

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Organized by DSP Lab, Dept. of E & ECE, IIT, Kharagpur Sponsored by Texas Instruments (India), Bangalore

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  1. A Training Programme on TI’s DSP Tools Lectures and Demonstrations by: Prof. R. V. Raja Kumar, IIT, Kharagpur Mr. S. V. V. Narayana Rao, TI, Bangalore Mr. G. Prakash, TI, Bangalore Organized by DSP Lab, Dept. of E & ECE, IIT, Kharagpur Sponsored by Texas Instruments (India), Bangalore

  2. Schedule of the Training Programme IIT Kharagpur Date:11-1-2002 (Friday) Time: 4.30 to 6.30pm; Venue:F-127 1. An Introduction to DSP tools: 4.30 to 5.15pm 2. An Introduction to CCS: 5.15 to 6.30 pm CCS Basic Introduction followed by CCS v2 features Instruction Set Simulator Overview Dept. of E & ECE © Prof. R. V. Raja Kumar

  3. Training Prog. Schedule (Contd.) IIT Kharagpur Date:12-1-2002 (Saturday) Time: 9.00 to 12.30pm; Venue:F-127 3. CCS Features Demonstration : 9.00 - 10.45 am Configuring Target Devices Developing a Simple Program Project Management Editing Techniques Debugging Tools Data Visualization Tea: 10.45 to 11.00 am Profiling Code Execution: 11.00am - 12.30 pm PBC Using GEL Language Simulating PinConnect and PortConnect DSP/BIOS Demo Dept. of E & ECE © Prof. R. V. Raja Kumar

  4. Training Prog. Schedule (Contd.) IIT Kharagpur Date:12-1-2002 (Saterday) Time: 1.30 to 4.45pm; Venue:F-127 4. TMS320C5000™: The Personal DSP : 1:30 - 2:30 pm (World's Most Power-Efficient DSPs for Wireless Applications, C55x Architecture) 5. Demonstration Using DSK: 2.30 - 3.30pm Tea: 3.30 to 3.45pm Demonstration Using DSK(contd.): 3.45 - 4.45pm ----------------- Dept. of E & ECE © Prof. R. V. Raja Kumar

  5. Introduction to DSP Tools Prof. R. V. Raja Kumar Department of E & ECE Indian Institute of Technology, Kharagpur Email: rkumar@ece.iitkgp.ernet.in Phone: +91 - 3222 83542 (O) +91 - 3222 83543 (R) Fax: +91 - 3222 - 82263

  6. Importance of DSP IIT Kharagpur • Advantages of dig. Implementations: • Flexibility of the hardware; high accuracy; large dynamic range, miniaturization; low power consumption. • Developments in IC technology  • No. of high speed and low power DSPs at low prices . • Result  • Increased use of DSPs for digital implementations • DSPs are targeted for  speech processing, comm. systems and wireless, motor control, picture compression, robotics, control systems and general purposes. Dept. of E & ECE © Prof. R. V. Raja Kumar

  7. Status of DSP Education IIT Kharagpur • DSP found its place in Engineering education both at undergraduate and graduate level, world over . • But, the lab. practice in DSP has not gained enough momentum. • Present lab. practice in DSP  simulation studies using high level languages like ‘C' and simulation packages like Matlab. •  good for studying the performance of algorithms and schemes • No practical implementation aspects like no. system, finite register length effects, optimization based on proc. Architecture... Dept. of E & ECE © Prof. R. V. Raja Kumar

  8. A Typical DSP system IIT Kharagpur Analog Analog O/P I/P Anti- Aliasing filter Sample & Hold ADC DSP DAC LPF x (t) x (nTs) x (n) y (n) y (t) y’ (t) Sampling frequency ·Special purpose custom hardware ·   Digital signal processors (DSP's) ·   General purpose processors A DSP system can be   Dept. of E & ECE © Prof. R. V. Raja Kumar

  9. Digital Signal Processors (DSPs) IIT Kharagpur • ·A hardware MAC  MAC Ops in single cycle of the processor. • ·Simultaneous accessing of instructions and data • ·Hardware to facilitate low overhead looping or it. computation • ·On chip programmable and data RAM which are often accessi- ble from two different data buses • ·Hardware for multiple op’s performed in parallel in single cycle. • ·Fast interrupt and sequential and parallel input-output support • ·Application specific architecture • Some of these features are in common with general purpose microprocessors.   Dept. of E & ECE © Prof. R. V. Raja Kumar

  10. Families of Texas Instruments DSP’s IIT Kharagpur Dept. of E & ECE © Prof. R. V. Raja Kumar

  11. Families of Analog Devices DSP’s IIT Kharagpur Dept. of E & ECE © Prof. R. V. Raja Kumar

  12. Families of Motorola DSP’s IIT Kharagpur Dept. of E & ECE © Prof. R. V. Raja Kumar

  13. Families of Lucent DSP’s IIT Kharagpur Dept. of E & ECE © Prof. R. V. Raja Kumar

  14. DSP Processor Options for Lab. IIT Kharagpur • Fixed point processors: • TMS320c2X, TMS320c5X and TMS320c62X • (Modulators, demodulators, carrier and clock recovery etc.,) • Floating point processors: • TMS320c3X and TMS320c67X • (Speech processing, control systems, equalization etc.,) • one of C3X or C67X floating point DSPs and • one of C5X or C62X may be the min. requirement for lab. practice. Dept. of E & ECE © Prof. R. V. Raja Kumar

  15. DSP Lab Tools (TI) IIT Kharagpur Hardware tools: DSP (DSKs), evaluation modules (EVMs) and other DSP boards  For real-time DSP experiments, a DSK/EVM/Emu. is suitable along with a host system, which can be a typical PC. Software tools: Assembly language tools, DSP simulator, C compiler and C source debugger. Code Composer Studio (CCS)  IDE: Simulates, C compiles and works with a DSK Dept. of E & ECE © Prof. R. V. Raja Kumar

  16. DSP Software Development flow IIT Kharagpur C Source file C Compiler Assembler Source Assembler Library build utility COFF Object file Archiver Run time supp.Library Library of Object file Linker Exec. COFF file Debugging tools on a PC To PC for Emulation Absolute lister Cross-reference lister Hex conversion utility Hexadecimal Object file To TMS320CXX target system Dept. of E & ECE © Prof. R. V. Raja Kumar

  17. C30 host port D D 16 TMS320C30 Expansion bus Primary bus External flags Serial port 0 INT0 - INT2 Emulation Control Serial port 1 16 PC Interface bus A D SRAM 16K x 4 32 AIC TLC32044 Control Logic Analog buffer / amp 8 TBC host port D D TBC SN74ACT8990 D In Out 16 10-pin header C3X Evaluation Module (EVM) IIT Kharagpur Dept. of E & ECE © Prof. R. V. Raja Kumar

  18. I/O Expansion Connector TMS320C5X Control Serial Port D0-D15 A0-A15 TDM Port JTAG Emulation Port Analog Interface TLC32046 TDM port 10-pin header 64K SRAM Program / Data Emulation SN74ACT8990 (TBC) Host / Target Message Interface PC / AT Bus Interface C5X Evaluation Module (EVM) Status of DSP Education Status of DSP Education IIT Kharagpur RCA Jack Analog Out RCA Jack Analog In Dept. of E & ECE © Prof. R. V. Raja Kumar

  19. Expansion Connector TMS320C5X Control Serial Port D0-D15 A0-A15 TDM Port JTAG Emulation Port RCA Jack Analog Out RCA Jack Analog In Analog Interface TLC32040 32K X 8 PROM Bootcode XDS510 Port 14-Pin Header C5X DSP Starter Kit (DSK) Status of DSP Education Status of DSP Education IIT Kharagpur Dept. of E & ECE © Prof. R. V. Raja Kumar

  20. DSP Simulator IIT Kharagpur • A DSP simulator simulates DSP environment on a computer like a PC without the actual DSP chip or hardware. • It can accept DSP assembly language programs. The assembly language programs developed using the assembly language tools can be executed using a simulator, off-line. • DSP based systems can be developed and tested using a simulator: • Low cost • Off-line testing  Dept. of E & ECE © Prof. R. V. Raja Kumar

  21. C Compiler IIT Kharagpur The C compiler converts a given program written in C language and produces the equivalent assembly language code.  No manual assembly language coding The so converted assembly code can be assembled, linked and used for implementing a system. Although, code generation can be done quickly, the code so generated is less efficient. Dept. of E & ECE © Prof. R. V. Raja Kumar

  22. Assembly Language Tools IIT Kharagpur The assembly language tools create and use object files. The constituents are, Assembler:assembly lang. source files  m/c lang. obj. files (instructions, assembler and macro directives). Linker:Combines obj. files into single exe. Module. Archiver:Collects a group of files into a single archive file. Absolute lister:listing of absolute addresses of obj. file Cross-ref. Lister:shows symbols, their definitions and ref. In linked source files. Dept. of E & ECE © Prof. R. V. Raja Kumar

  23. Integrated Development Environments IIT Kharagpur Dept. of E & ECE © Prof. R. V. Raja Kumar

  24. Code Composer Studio IIT Kharagpur • The CCS is an integrated suite of DSP software development tools • efficient 'C6000 C compiler, Assembly Optimizer with the Code Composer IDE, Advanced Data Visualization, standard open APIs, DSP/BIOS and Real-Time Data Exchange(RTDX) • Optimizing C compiler fully exploits the architecture's instruction-level parallelism and orthogonal instruction set • Assembly optimization supports automatic scheduling, optimizing and separation of parallel tasks from linear assembly code • Debugger  Conditional or hardware breakpoints are based on full C- expressions, local variables or CPU register symbols. • Real-Time Analysis Using RTDX technology, DSP/BIOS provides a real- time window into the target system Dept. of E & ECE © Prof. R. V. Raja Kumar

  25. C54X CCS Debugger IIT Kharagpur Project files Memory map C Source file Dis-Assembly window (Assembly source) Data display Graphics Display Dept. of E & ECE © Prof. R. V. Raja Kumar

  26. C54X CCS Debugger IIT Kharagpur Dept. of E & ECE © Prof. R. V. Raja Kumar

  27. Code Composer Studio (IDE) or DSP Compiler / Assembler / Linker / Simulator / Debugger I/O through data files Host PC A Setup for Non-real-time Experiments IIT Kharagpur Assembly language code and implementation flavor is present, but real-time experiments cannot be carried out using this setup. Dept. of E & ECE © Prof. R. V. Raja Kumar

  28. Code Composer Studio (IDE) or DSP Compiler / Assembler / Linker / Simulator / Debugger mic Signal gen. O/P I/P Head- phones Host PC DSP EVM CRO A Setup for Real-time Experiments IIT Kharagpur Assembly language code and implementation flavor is present. Real-time experiments can be carried out using this setup. Dept. of E & ECE © Prof. R. V. Raja Kumar

  29. Experiments on Familiarization with Tools IITKharagpur • Familiarization with floating point and fixed-point processor tools: • DSP Simulator, C compiler, Assembly language tools and C source debugger • and / or • Code generation studio (CCS) • DSK and or EVM along with any one or both of the above. • Experiments: • I/O signal handling through files, interrupt based processing, • initialization of the DSK/EVM and I/O signal handling • processor specific experiments involving registers etc. Dept. of E & ECE © Prof. R. V. Raja Kumar

  30. Thank You!