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Survey on Reconfigurable Computing for Signal Processing Applications

This survey explores the significant potential of reconfigurable computing in signal processing applications, emphasizing adaptability in varied execution environments and constraints. It discusses the development of robust large-scale signal processing systems capable of operating in complex, non-stationary environments while balancing cost and flexibility. The report delves into pre-runtime and run-time reconfigurability, with a focus on how FPGAs and adaptive structures can meet specific application needs. The conclusion highlights the limitations of current run-time systems in leveraging full reconfigurability of hardware components.

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Survey on Reconfigurable Computing for Signal Processing Applications

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  1. A survey on Reconfigurable Computing for Signal Processing Applications Anne Pratoomtong ECE734, Spring2002

  2. Motivation • Adaptability under a variety of execution environment and constraints. • Development of a Robust-Large Scale signal Processing System for operation in complex non-stationary environment. • Cost and flexibility.

  3. Reconfigurable computing • Pre-Runtime Reconfigurable • Run-time Reconfigurable (RTR) -FPGAs base RTR -Structure Adaptive RTR

  4. Pre-Runtime Reconfigurable • Computing system or device logic functionality and interconnect can be customized to suit a specific application through post-fabrication, user-defined programming. • Hardware Platform contains a mix variety of macro module with different characteristic connected via reconfigurable communication network.

  5. Run-time Reconfigurable (RTR) • System logic and/or interconnect functionality can be modified during application execution. • Useful for DSP applications whose performance and functionality depend on run-time factors such as time-varying noise, runtime environment, computation resources available, or time-varying data set.

  6. Conclusion • RTR system does not fully utilize the ability to change the structure of the hardware reconfigurable component such as FPGA • Multiple computing hardware Vs Single computing hardware. • Hardware reconfiguration for the RTR system largely occur during the compile phase.

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