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RENO Electronics - QBEE -

RENO Collaboration Meeting, 2008.10.10. RENO Electronics - QBEE -. 장 지 승 ( 전남대학교 ). Contents. QBEE 의 소개와 성능 DAQ 구성 - Master Clock 소개 - Online computer setup 3. 진행상황과 계획. QBEE - Q TC B ased E lectronics with E thernet -. Super-Kamiokande 를 위해 동경대의 ICRR 에서 개발 개발목표

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RENO Electronics - QBEE -

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  1. RENO Collaboration Meeting, 2008.10.10. RENO Electronics- QBEE - 장 지 승 (전남대학교)

  2. Contents • QBEE의 소개와 성능 • DAQ 구성 - Master Clock 소개 - Online computer setup 3. 진행상황과 계획

  3. QBEE - QTC Based Electronics with Ethernet - • Super-Kamiokande를 위해 동경대의 ICRR에서 개발 • 개발목표 • Stable DAQ system for next 10~20 years ATM (Analog Timing Module from KEK) was used for long time 2. Better data quality 1) Reflection signal and Temperature dependence A dead time for mu-decay detection (~us interval events) 2) Charge dynamic range and Energy resolution lower energy(~3MeV) solar neutrinos to multi-GeV or higher energy neutrinos 3. Recording every hit of PMT Anti-neutrino events for supernova relic neutrino search by detecting 200us delayed signal • High speed signal processing Nearby galactic supernova burst events Dead time free !! High sensitivity !! High speed !!

  4. Overview of QBEE 8QTC(Charge to Time converter) Ethernet card 100Mbps Computer …. 12 PMTs RJ45 100Mbps • Master Clock • 60MHz clock • TDC reset • TRG ID • Event# RJ45 DC Power supply …. 12 PMTs FPGA 4TDC(Time to Digital Converter)

  5. Charge Hit timing • QTC • TDC (ATLAS Muon TDC) • - Digitizes the each edge time • FPGA (DSM, SIC etc) • - Calculates the digitized hit timing • and integrated charge

  6. Built-in Calibration pulser & Temperature sensor

  7. Specification of QBEE based on IWATSU manual 1. The number of the ch. : 24ch 2. Charge dynamic range : 0.2-2500pC (1250 p.e.), 3 gain range (Small ~51pC, Medium 51~357pC, Large 357~2500pC 3. Charge Linearity : +/- 1%

  8. 4. Charge resolution: ~0.1pC(.05p.e.), Timing resolution: ~0.15nsec 5. Temperature dependence (per degree) Gain variation : 0.4% Pedestal variation : less than 0.15pC Charge accuracy after pedestal subtraction : less than 0.15% Timing variation : less than 0.02nsec

  9. -0.3mV PMTsignal 6. Processing speed : 900ns/hit 7. Discriminator : 0 ~ -1.7mV, 0~3.4mV, 0.-11.9mV 8. Noise level : Noise hit rate < 10Hz @ -0.3mV DSC 9. Cross talk hit : less than 1/1000 between ch. @-0.6mV DSC

  10. 10. Reflection coefficient : less than 1/1000 (-60dB) @ 20inch PMT and 70m coaxial cable 11. FIFO memory size : 1.5MB 12. Power consumption (Maximum) +5.2V/1.6A, -5.4V/0.7A, +8/0.81A, -8V/0.3A, +15V/0.1A(DB) less than 24W

  11. DAQ 구성 • RENO requirement – 18 QBEEs per 1 detector Computer QBEE output 100Mbps Distributer 60MHz clock TRG ID, event# 100Mbps Master Clock Module 60KHz Serial signal ( TRG ID & Event # etc. ) Flat cable @ SuperK Sync. Out TRG module

  12. MCLK output specification • Output via 100Mbps Ethernet cable • (1,2) pair : 60 MHz clock • (5,6) pair : TDC reset + Trigger ID + 32 bit event # • (3,4) and (7,8) pairs : not used • Spec. of serial signal[ 1 bit = 1 clock, total 38 clocks = 633 nsec ] Start at a negative edge of the clock 60 MHz clock Serial signal Header (always 1) Trigger (Narrow/Wide + Pedestal + Split) • Trigger on/off + TDC reset on/off • Trigger w/o TDC reset (10) • Trigger w/ TDC reset (11) • TDC reset only (No Trigger) (01) 32 bit event #

  13. Example of Master Clock Output 110 100 00000000000000100110110000011001 60MHz clock 60KHz Serialized signal 633nsec Serial signal Header (always 1) Trigger (Narrow/Wide + Pedestal + Split) Trigger on/off + TDC reset on/off 32 bit event #

  14. Online computer setup with QBEE based on SuperK online system Front End Computer • Each computer has 4 core •  is Ethernet cable collector sorter sender 1Gbps x 3 100Mbps/QBEE x 18 LAN SWITCH SISCO SYSTEM Catalyst 2960G Series Computer Fujitsu PGR10317L-D QBEE 24 PMTs …… …… 18 output Distributor collector sender Bit3 1Gbps(?) Master Clock Module VME- TRG Module Flat cable Computer Sync. Out LAN SWITCH Merger Software trig. Storage Organizer Computer . . . Computer Data flow manager Computer

  15. Schematic view of data flow in front end computer • based on SuperK online system Front end computer Fast Ethernet QBEE Collector 24PMTs Collector QBEE Sorter Sender Collector QBEE Merger Collector QBEE 27MB/sec Collector QBEE • Software for this process was provided by Iwatsu and SuperK online group. 18 QBEEs 1.5MB/sec/QBEE

  16. Online computer setup with QBEE Front End Computer • Each computer has 4 core •  is Ethernet cable collector sorter sender 1Gbps x 3 100Mbps/QBEE x 18 LAN SWITCH SISCO SYSTEM Catalyst 2960G Series Computer Fujitsu PGR10317L-D QBEE 24 PMTs …… …… 18 output Distributor collector sender Bit3 1Gbps(?) Master Clock Module VME- TRG Module Flat cable Computer Sync. Out LAN SWITCH Merger Software trig. Storage Organizer Computer . . . Computer Data flow manager Computer

  17. The Merger system Data from the front-end PC Combine the data from each FEPC by using the HW trigger number. Merger • The software trigger system #of events HW trig. no. 1 2 3 4 5 6 7 8 9 Event no. 1 2 3 4 5 6

  18. Electronics setup for 1 detector Power Supply for TKO MCLK & Distributor LAN switch 18 QBEEs in TKO 6 PC FAN FAN NIM PMT HV supply 10 HV splitter VME w/ TRG

  19. 진행상황과 계획 11월 중 QBEE test시작을 목표로 하고 있음

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