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Computer Architecture Introduction Review

Computer Architecture Introduction Review. ECE 0909-443/444 Y. Tang. QUESTIONS:. What have you known about digital design ?. Where do you start to design a microprocessor ?. Number Systems. Digital computers store information in binary Binary allows two states On yes true 1

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Computer Architecture Introduction Review

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  1. Computer Architecture Introduction Review ECE 0909-443/444 Y. Tang

  2. QUESTIONS: • What have you known about digital design ? • Where do you start to design a microprocessor ?

  3. Number Systems • Digital computers store information in binary • Binary allows two states • On yes true 1 • Off no false 0 • Other number systems: Decimal, Hexadecimal and octal

  4. Number Systems (cont.) • A number system of base n is a system that uses distinct symbols for n digits

  5. Number Systems (cont.) • To determine the quantity that the number represents: (Number)n = (multiply each digit by an integer power of n)

  6. Conversion from Decimal • A decimal integer to a base n representation • successive division by n • accumulation of the remainders • A decimal fraction to a base n representation • successive multiplication by n • accumulation of the integer digits

  7. Hex, Octal and Binary Conversion • Conversion between base 2 and base 8 = 23 e.g., 111010b = 111 010 = 72o • Conversion between base 2 and base 16 = 24e.g., 111010b = 11 1010 = 3Ah

  8. 1101 b (signed binary number) 0010 b (reverse all bits) + 1 0011 b (unsigned value = 3) Two’s complement • A method to represent negative numbers whose msb equals to 1: - 3d = two’s complement of n =NOT(n) +1

  9. Boolean Algebra • True/False • High/Low • On/Off • +5 Vdc / 0 Vdc (+3.3 Vdc / 0 Vdc) • Notation • Variable by itself is assumed “true” • Variable with a symbol denotes complementation: ¯ ~ * /

  10. X0=0 X1=X XX=X XX*=0 X+0=X X+1=1 X+X=X X+X*=1 X**=X Boolean Identities • Commutative Laws: • X+Y=Y+X • XY=YX • Associative Laws: • X+(Y+Z)=(X+Y)+Z • X(YZ)=(XY)Z • Distributive Laws: X(Y+Z)=XY+XZ • DeMorgan’s Theorems: (XY)*=X*+Y* (X+Y)*=X* Y*

  11. Gates (p. 63 M&K) AND ( ^ • & C: & ) OR (  + C: | ) NOT {Inverter} ( ¯ ~ * / C: ~ ) XOR (  C:  ) NAND NOR XNOR

  12. Two types of circuits • Combinational Circuits • Outputs at any time are determined by the inputs using logic operations • For each binary combination of the input variables, there is one possible binary value on each output • Sequential Circuits • A combinational circuit plus storage elements • Outputs and the next state are functions of inputs and present states.

  13. Combinatorial Design Process • Problem statement • Truth table and describing Boolean Algebra • Simplification • Implementation • Verification

  14. A S B FA Ci Co Design Examples • Full Adder (Step 1: Design a device that performs binary addition, including carry input.)

  15. Ci A B S Co 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Design Examples (cont.) • Full Adder Truth Table (Step 2) Sum-of-Product Boolean expressions for S and Co: S = Ci*A*B + Ci*AB* + CiA*B* + CiAB Co = Ci*AB + CiA*B + CiAB* + CiAB

  16. Design Examples (cont.) • Graphical Simplification (Step 3):K-map Ci 0 1 0 0 00 BCi 01 0 1 AB AB 11 1 1 ACi 10 0 1 Co = AB + ACi + BCi

  17. Design Examples (cont.) • Other minimization methods: - SwitchMin Digital Circuit Minimizer http://incolor.inebraska.com/double/softlib/switchmin.html - Quine-McCluskey algorithm http://www.seattlerobotics.org/encoder/200106/qmccmin.htm#1 - Espresso http://cse.bellarmine.edu/espresso

  18. & & & + Design Examples (cont.) • Implementation (Step 3) Translate the simplified BA to a network of gates: Ci A Ci Co B A B

  19. Design Examples (cont.) • Verification (Step 4) Verify the proper behavior of the design. Use simulation techniques to present test vectors and compare responses to predictions.

  20. Combinatorial Function Blocks • Decoders • Encoders • Multiplexers

  21. Sequential Circuits • Standard graphics symbols for latches and Flip-Flops (p. 198 M&K) • Flip-Flops Characteristic Tables (p. 199 M&K) • Sequential circuit design procedure (p. 208 M&K)

  22. Design Example • sequence recognizer to detect the following bit sequence “1011” (Step 1: Obtain either state diagram)

  23. Present State Input Next State Output A B X A B Y 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0 0 1 0 1 1 1 0 1 1 0 1 0 0 1 1 1 0 1 1 Design Example • Obtain the state table and assign binary codes to the states (Steps 2 & 3)

  24. Design Example • Derive the flip-flop input and output equations (Steps 4 & 5) DA(t+1)=AB*X+BX* DB(t+1)=X Y=ABX

  25. CPU Registers ControlUnit ALU Data/Address Bus Basic Computer Architecture Memory Input Unit Output Unit

  26. Central Processing Unit (CPU) • Fetch: Fetch the next instruction from memory. (Copies the instruction into the CPU.) • Decode: The control unit interprets the instruction and instructs the other parts of the CPU to carry it out. • Execute: The ALU executes the instruction, return its output into the destination operand, and updates status flags.

  27. Course Outline • Design specification with Verilog HDL • Microprocessor Design Strategies • Structural Modeling • Behavior Modeling • Register Transfer Language (RTL) • Algorithmic State Machine (ASM) • Design of Datapath and Control Logic • Memory Design

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