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RPC Data in the CSC RAT

RPC Data in the CSC RAT. Greg Rakness University of California, Los Angeles. CLCT. LB. FEB. RPC. TMB. RAT. RPC  RAT Schematic. On detector. In Towers. CSC Peripheral Crate. Resistive Plate Chambers. Trigger Mother-Board. Front End Boards. RPC Link Board.

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RPC Data in the CSC RAT

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  1. RPC Data in the CSC RAT Greg Rakness University of California, Los Angeles G. Rakness (UCLA)

  2. CLCT LB FEB RPC TMB RAT RPC  RAT Schematic On detector In Towers CSC Peripheral Crate Resistive Plate Chambers Trigger Mother-Board Front End Boards RPC Link Board RPC–ALCT Transition Board ~30m cable SP PC custom back-plane 8-15m SCSI cable • RPC LB data  RAT = [(12 pad bits) + BXN (3 bits)] • Scope: RE+1/2 and RE+1/3 (RE+1/1 chambers don’t exist—expected for upgrade) •  RPC trigger primitive data to be used by TMB for “ghostbusting” in CSC trigger primitives (eventually) G. Rakness (UCLA)

  3. RAT-TMB phase determination  One delay per TMB/RAT (no RPC needed) • Send fixed pattern from RAT to TMB in “sync-mode” • Read RAT 80MHz demux registers at TMB • Compare 19-bits of data read to pattern expected ************************** ** TMB-RAT delay results * ************************** rpc_delay bad data count --------- -------------- 0 10f3d 1 1292c 2 1292c 3 1292c 4 1292c 5 1292c 6 74ac 7 0 8 0 9 0 a 0 b 0 c 2f7 ----------------------------------------------- Window = 0 is 5 channels wide, from 7 to 11 => BEST DELAY VALUE (window 0) = 9 <= ----------------------------------------------- • CONCLUSIONS: • Window Centroid •  Default value set at TMB power-up • Width of window ~10ns G. Rakness (UCLA)

  4. Parity bit • RPC LB firmware is currently sending… [12 pad bits + 2BXN + 1 parity bit] • The parity bit is computed by the RPC LB based on the rest of the data word in order to make the total number of bits sent be an ODD number… • The CSC RAT firmware computes the parity bit using the same algorithm as the RPC LB firmware and stores the number of discrepancies in a counter… G. Rakness (UCLA)

  5. RPC LB  CSC RAT phase scan Goal: determine the optimal setting of the phase delay at the RAT in order to latch the RPC endcap LB data • Technique:  Find the center of the window with 0 parity bit errors… • Change the rpc0_rat_delay setting on the RAT • Reset the parity error counter • Wait for one second • Reads out the counter • The "best" value is in the middle of the window of 0 errors in this counter Example: ME+1/2/3 delay    parity counter errors -------   ---------------------------    0               0    1               0    2               0    3               10f    4               ffff    5               ffff    6               42    7               0    8               0    9               0    a               0    b               0    c               0 G. Rakness (UCLA)

  6. Some obvious problems… • delay    parity counter errors -------   ---------------------------    0               0    1               0    2               0    3               0    4               0    5               0    6               0    7               0    8               0    9               0    a               0    b               0    c               0 • All ME+1/1 (chambers don’t exist…) • ME+1/2/25 •   delay    parity counter errors -------   ------------------------------    0               ffff    1               ffff    2               ffff    3               ffff    4               ffff    5               ffff    6               ffff    7               ffff    8               ffff    9               ffff    a               ffff    b               ffff    c               ffff • ME+1/2/2 • ME+1/3/7, ME+1/3/8 G. Rakness (UCLA)

  7. Number of chambers with parity bit errors vs. RPC-RAT delay Setting used for data until Friday 3 October… G. Rakness (UCLA)

  8. Broken up by “Type” • 49 chambers of Type “A” and “B” would work OK with delay = 11 • Value of 4-5 is best to avoid… G. Rakness (UCLA)

  9. Type “C” are pesky • 19 chambers of type “C” come in clumps • Have asked the RPC colleagues for input… • Have set delay value = 11 for current running… G. Rakness (UCLA)

  10. Some details • Run 66423 = CSC trigger only • Wrote Skim module to select events with ME+1/2 and ME+1/3 data • Not necessary for this run, but will be useful for other runs • DCCExaminer currently performs quality checks assuming the number of RPC data words = number of CLCT data words… • Set ExaminerMask bit “TMB Error check = 0” • Run over 10k events before Unpacker Crash… • To be fixed by V. Barashko (UF) • ME+1/3 data only • Not much seen in ME+1/2 • Removed ME+1/3/7 and ME+1/3/8 from analysis • 1 CLCT and 1 ALCT and 1 RPC digi… G. Rakness (UCLA)

  11. rpc_fifo_pretrig = 5 (CLCT = 7) • rpc_fifo_tbins = 15 (CLCT = 12) Time bin of Pad Bit arrival • Spread in RPC arrival  don’t know if it is from timing differences from chamber to chamber or jitter within a chamber • Late w.r.t. CLCT pretrigger • Tying the RPC readout window to the CLCT FIFO cuts off most of the data… • As temporary fix for DCCExaminer, have set: • rpc_fifo_tbins = 12 • rpc_fifo_pretrig = 2 G. Rakness (UCLA)

  12. ALCT wiregroup vs CLCT 1/2-strip Bits 0-3 G. Rakness (UCLA)

  13. ALCT wiregroup vs CLCT 1/2-strip Bits 4-7 G. Rakness (UCLA)

  14. ALCT wiregroup vs CLCT 1/2-strip Bits 8-11 G. Rakness (UCLA)

  15. Pad bit v (BXN+parity) Recall: RPC firmware makes parity bit so that total number of bits = odd number cut = one RPC bit, so there should only be an EVEN number of bits in the BXN + parity word Mostly “allowed” values of BXN+parity, except, what about these?? 000 001 010 011 100 101 011 G. Rakness (UCLA)

  16. Short Summary • Correlation seen, but weak statistics… • Should add more runs together • Some parity bit errors still… • Correlated to chambers with known parity error problems? G. Rakness (UCLA)

  17. Other stuff • Now on “CSC Component Replacement Committee”  A. Korytov thought I would be a good addition… • At experiment: • Occasional SLink errors seen on DCC 753 in high rate runs… This morning, swap DCC 753  751. Error moved with the DCC… • May be an issue of timing of DT+RPC compared to CSC triggers  Run 66933 taken today with CSC trigger (only) and all detectors in to look at timing G. Rakness (UCLA)

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