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This paper presents a novel approach to improving state-of-the-art placers, which are primarily HPWL-driven and often lack awareness of designs involving datapaths. By introducing a force-directed global placer and detailed techniques, we demonstrate the effectiveness of making placers structure-aware. The alignment of datapath cells and advanced algorithms for cell swapping and repartitioning yield significant improvements in StWL, showcasing how proper placement methods can enhance circuit design efficiency and overall performance.
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Keep it Straight: Teaching Placement how to BetterHandle Designs with Datapaths Samuel I. Ward†, Myung-Chul Kim‡, NatarajanViswanathan, Zhuo Li, Charles Alpert, Earl E. Swartzlander, Jr., David Z. Pan ECE Dept. The University of Texas at Austin IBM Austin Research Laboratory
Outline • Introduction • Motivation • Approach • Experimental results • Conclusion
Introduction • most state-of-the-art placers- HPWL-driven- not structured-aware • StWL correlates with routed wire length much better than HPWL.[18] • Alignment of the datapath cells guides indirect StWL optimization
Motivation • We can teach these HPWL-driven placer to make them structure-aware • Alignment of Datapath cells can implicitly improve StWL
Approach • In this work, a force-directed global placer in the spirit of SimPL is used along with a detailed placer similar to FastPlace-DP.
Alignment net • Very similar to pseudo net in SimPL • These nets are created at the beginning of global placement and remain persistent during the entire global and detailed placement stages.
Fixed-point Alignment Constraint • Lookahead legalization generates a fixed-point location for all cells. • For all cells in datapath group, modify the fixed-point locations.
Aligned DatapathCell Swapping • This work, unlike [20], bounds the swap region perpendicular to dkwhile keeping the overlap penalty the same.
Datapath Group Repartitioning • This technique minimizes internal net cut values potentially improving both HPWL and StWL. • The base cut algorithm is from KL[24].
Conclusion • Presents a unified framework to enhance current random logic placers to better handle designs containing datapath logics. • A set of new global and detail placement techniques were presented to overcome the shortcomings of the HPWL model for datapaths. • Experimental results have great improvement in StWL.