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Reconfigurable Supercomputing

This article explores the transformative impact of reconfigurable computing on high-performance computing (HPC) and its pivotal role in accelerating research. We address key challenges in traditional scalar/vector systems and multiprocessor clusters, highlighting the need for dedicated hardware that is adaptable and cost-effective. By integrating technologies such as Xilinx Virtex FPGAs and advanced algorithms, researchers can achieve greater throughput and faster development cycles. This shift not only enhances computational efficiency but also fosters collaborative research and grid computing, leading to significant advancements in science and engineering.

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Reconfigurable Supercomputing

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  1. Reconfigurable Supercomputing 2004 Accelerating Researcher Throughput

  2. Key Issues in HPC • Leveling off of performance • Traditional Scalar/Vector – long product cycles, too few vendors • MPP Clusters – only marginal performance gains from Intel, AMD, etc., roadmaps • Scalar/Vector vs. Cluster tradeoff • Need for dedicated hardware operations • Need for price/performance • Dedicated hardware takes too long to develop (ASIC design & build cycles) • Clusters can change frequently, but not substantively

  3. HPTi Factors for New Solution • Reconfigurable Computing • Introduces dedicated hardware capability… • …that can change at speed of thought • Nallatech BenNUEY (e.g., PCI-4E: DIME II) • Xilinx Virtex family (e.g., BenPRO, BenBLUE) • Faster HPC Development Cycles • Algorithms • Computational science • Feedback to hardware development • Systems integration and management workflow and software • Evolve to Grid computing and Collaborative research/engineering Better Price/ Performance Accelerate Science… Enterprise Capability …Even Faster Acceleration

  4. Delivered and Benchmarked • 48 nodes • 2u, back-to-back (net 1u/node) • 96 FPGA’s • Annapolis Micro • Xilinx Virtex II • 34 Tera-Ops • In use today • All Commodity Parts

  5. Future: Grid & Collaborative Research • Grid • Networked FPGA clusters - multi-tier/multi-peer HPC • Intra-cluster flexibility • Processing • FPGA-based high-speed Interconnect • Graphics • Intra-board near-real-time reconfigurability • Apply Information Environment solution for metacomputing/metaqueueing capability • Apply GTK, OGSA to facilitate development, operations • Collaborative Research • Distributed visualization, model walkthrough • Heterogeneous architectures • Researcher independence from sites, specific platforms • Model and Data repositories

  6. HPTi Factors for New Solution • Reconfigurable Computing • Introduces dedicated hardware capability… • …that can change at speed of thought • Nallatech BenNUEY (e.g., PCI-4E: DIME II) • Xilinx Virtex family (e.g., BenPRO, BenBLUE) • Faster HPC Development Cycles • Algorithms • Computational science • Feedback to hardware development • Systems integration and management workflow and software • Evolve to Grid computing and Collaborative research/engineering Better Price/ Performance Accelerate Science… Enterprise Capability …Even Faster Acceleration

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