C ombinationality checking of cyclic circuits

Combinationality checking of cyclic circuits Wan-Chen Weng Date: 2013/07/01

Outline • Motivation • Example • Strongly Connected Components (SCC) • Problem formulation • Complete and Incomplete Side Input • Loop back tracing • Future work

Motivation(1/3) • Marc D. Riedel (JSAT 2011) • SAT-based dual-rail model checking for the combinationality of cyclic circuits • Add dummy variables and equivalent checkers to the corresponding module.

Motivation(2/3) • Marc D. Riedel (JSAT 2011) • The original circuit will be combinational when SAT = 0.

Motivation(3/3) • Dual-rail model • Compared to brute force algorithm, it checks the combinationality of cyclic circuits in a more elegant way. • But the model still consumes memories and is the bottleneck when the circuit size is large. • Instead of transforming logic gates into CNF, the relations between nodes are concerned.

Example (1/2) Normal transformation: n1 = A‧n2 n2 = B‧n4 n3 = C‧n2 n4 = n1‧n3 SAT (A, B, C, n1, n2, n3, n4) = (1, 1, 1, 1, 1, 1, 1) or (1, 1, 1, 0, 0, 0, 0) n1 A n4 n2 B n3 C

Example (2/2) Normal transformation: n1 = A‧n2 n2 = B‧n4 n3 = C‧n2 n4 = n1‧n3 SAT (A, B, C, n1, n2, n3, n4) = (0, 0, 1, 0, 0, 0, 1) n1 A (A, B, C) = (NCV, NCV, NCV) → UNSAT cannot detect whether the circuit is combinational or not. cannot describe the behavior when the circuit is non-combinational. n4 n2 B n3 C

Strongly Connected Components (1/3) n1 A n4 n2 B n3 C A directed graph is called strongly connected if there is a path from each vertex in the graph to every other vertex. By using SCC,theoriginal cyclicstructurecanbepreservedandweonlyconsiderthecontrollabilityofside inputs.

Strongly Connected Components (2/3) For everyinputassignment If (A,B,C)=(0,0,0) Then everyfanoutisanexactvalue. Thus loopsarefalseandtheSCCiscombinational. n1 A BUT! It’stoostrictfor(A,B,C)tobe(0,0,0)ineveryassignment. n4 n2 B n3 C

Strongly Connected Components (3/3) For aninputassignment If (A,B,C)=(0,1,0) Then loopn2_n3_n4andloopn2_n1_n4arestillfalse. n1 A n4 n2 B n3 C

Problem formulation(1/1) • Given: • a cyclic circuit C. • Determine: • if C is combinational. • By using: • SAT-based approaches describing relations between nodes in strongly connected components. If the result is SAT, the circuit is non-combinational.

Complete and Incomplete Side Input (1/1) n1 A F D n4 n2 B G E n3 C • Complete side input(CSI) vs. incomplete side input(ISI) • CSIs:side inputs completely come from somewhere outside the SCC. • ISIs: side inputs of a loop that come from somewhere inside the SCC. • CSIs: A, B, C • ISIs: • G (for loopn2_n1_n4) • F (for loopn2_n3_n4)

Loop back tracing (1/5) n1 n1 A A n4 n4 n2 n2 B B n3 n3 C C • Combinational vs. Non-combinational • Fixed value vs. Unknown value.

Loop back tracing (2/5) (loopn2_n1_n4) ∨ (loopn2_n3_n4) = (B ∧ A ∧ n3) ∨ (B ∧ C ∧ n1) n1 A ISIs are affected by their fanins. Thus, derive an equation with fanins. n4 n2 B n3 C • Non-combinational conditions • At least one loop is a real cycle. • All the side inputs of the loop are non-controlling value.

Loop back tracing (3/5) n3x = C‧n2x = C‧ (B‧n4x) =C‧B‧ (n3x-1‧n1x) =C‧B‧n3x-1‧(A‧n2x-1) =A‧B‧C‧n3x-1‧n2x-1 n1 A n1x = A‧n2x = A‧ (B‧n4x) =A‧B‧ (n1x-1‧n3x) =A‧B‧n1x-1‧(C‧n2x-1) =A‧B‧C‧n1x-1‧n2x-1 n4 n2 B (B ∧ A ∧ n3) ∨ (B ∧ C ∧ n1) n3 C • To derive the dependency • Derive the equation of the ISI and stop the tracing when nodesarereachedagain.

Loop back tracing (4/5) n3x =A‧B‧C‧n3x-1‧n2x-1 e.g. P=A‧B‧C‧Q‧R n1 A n1x =A‧B‧C‧n1x-1‧n2x-1 e.g. W=A‧B‧C‧Y‧R n4 n2 B n3 C • To derive the dependency • Assignnodexandnodex-1to differentvariables.

Loop back tracing (5/5) n1 n1 A A n3x =A‧B‧C‧n3x-1‧n2x-1 n1x =A‧B‧C‧n1x-1‧n2x-1 (A,B,C,n1x,n1x-1,n2x-1,n3x,n3x-1) =(1,1,1,1,1,1,1)or(1,1,1,0,0,0,0) n3x =C＋B＋n3x-1＋A‧n2x-1 n1x =A＋B＋n1x-1＋C‧n2x-1 (A,B,C,n1x,n1x-1,n2x-1,n3x,n3x-1) =(1, 1, 1, 0, 1, 1, 0, 1) n4 n4 n2 n2 B B n3 n3 C C • Can detectoscillation and uncertainty.

Future work Trace code and implement.

C ombinationality checking of cyclic circuits