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EMK 310

EMK 310. ii. Microprocessor system terminology (Bolton, Sections 1.7 and 1.8). 1.7 Microprocessor system. Microprocessor systems are made of: Microprocessor (CPU) Memory Memory for instructions Memory for data Interface ports Standard interfaces include RS232 (serial communication) I2C

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EMK 310

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  1. EMK 310 ii. Microprocessor system terminology (Bolton, Sections 1.7 and 1.8)

  2. 1.7 Microprocessor system • Microprocessor systems are made of: • Microprocessor (CPU) • Memory • Memory for instructions • Memory for data • Interface ports • Standard interfaces include RS232 (serial communication) • I2C • CAN • SPI • Analogue inputs / outputs • Digital inputs / outputs

  3. 1.7 Microprocessor system • Buses: • Data bus: The bus carrying all the data. (To prevent communication errors tristate outputs are used when the device is off. • Address bus: Used to address specific locations in memory or used to specify the peripheral that the microprocessor wants to communicate with. • Control bus: Used to specify the action the peripheral should undertake. I.e. Specify whether the device should read or write.

  4. 1.7 Microprocessor system • Typical Microprocessor system:

  5. 1.8 Microprocessor (CPU) • Responsible for executing arithmetic and logic operations. • General architecture is given in the figure below:

  6. 1.8 Microprocessor (CPU) • The main components of a microprocessor include: • Arithmetic and logic unit (ALU) • Registers • Control unit

  7. 1.8 Microprocessor (CPU) • Important registers: • Accumulator • Flag register / status register / condition code reg. • Program counter reg. (PC) / instruction pointer (IP)

  8. 1.8 Microprocessor (CPU) • Important registers: • General purpose register – temporary storage • Memory address register – storage of addresses used for later computations • Stack pointer register – used to store return addresses when subroutines are called • Special purpose register – re-allocate index • Instruction register – stored for decoding

  9. 1.8 Microprocessor (CPU) • Example:

  10. Additional notes on IEEE floating point formats.(Appendix iv) • Self study!

  11. 1.9 Execution cycle and timing diagrams. (Bolton, Section 1.9) • Steps: • Fetch • Get operator code from memory via the data bus • Store code in instruction register • Decode – determine the nature of the operation • Fetch – further data • Execute

  12. 1.9 Timing diagrams • Timing:

  13. 1.9 Timing conditions • Conditions:

  14. 1.9 Timing conditions

  15. 1.10 Memory • ROM: • Masked ROM • Preprogrammed ROM • PROM • Programmable ROM • EPROM • Erasable and programmable ROM • EEPROM • Electrically erasable PROM

  16. 1.10 Memory • RAM: • SRAM • Static RAM • DRAM • Dynamic RAM • Chip select

  17. 1.12 CISC / RISC • CISC: • Complex instruction set computing • RISC: • Reduced instruction set computing

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